------------------------------------------------------------
-- VHDL PBA03_FPGA
-- 2012 5 5 23 16 56
-- Created By "Altium Designer VHDL Generator"
-- "Copyright (c) 2002-2004 Altium Limited"
------------------------------------------------------------

------------------------------------------------------------
-- VHDL PBA03_FPGA
------------------------------------------------------------

Library IEEE;
Use     IEEE.std_logic_1164.all;

Entity PBA03_FPGA Is
  port
  (
    BUS_7M       : In    STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_7M
    BUS_A0       : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_A0
    BUS_A1       : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_A1
    BUS_A2       : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_A2
    BUS_A3       : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_A3
    BUS_A4       : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_A4
    BUS_A5       : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_A5
    BUS_A6       : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_A6
    BUS_A7       : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_A7
    BUS_A8       : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_A8
    BUS_A9       : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_A9
    BUS_A10      : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_A10
    BUS_A11      : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_A11
    BUS_A12      : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_A12
    BUS_A13      : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_A13
    BUS_A14      : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_A14
    BUS_A15      : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_A15
    BUS_D0       : InOut STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_D0
    BUS_D1       : InOut STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_D1
    BUS_D2       : InOut STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_D2
    BUS_D3       : InOut STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_D3
    BUS_D4       : InOut STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_D4
    BUS_D5       : InOut STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_D5
    BUS_D6       : InOut STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_D6
    BUS_D7       : InOut STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_D7
    BUS_DMA      : InOut STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_DMA
    BUS_DMAIN    : In    STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_DMAIN
    BUS_DMAOUT   : InOut STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_DMAOUT
    BUS_INTIN    : In    STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_INTIN
    BUS_INTOUT   : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_INTOUT
    BUS_IRQ      : In    STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_IRQ
    BUS_NMI      : In    STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_NMI
    BUS_PHASE0   : In    STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_PHASE0
    BUS_PHASE1   : In    STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_PHASE1
    BUS_R_W      : InOut STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_R_W
    BUS_RDY      : InOut STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_RDY
    BUS_RESET    : In    STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=BUS_RESET
    CLK_EN       : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=CLK_EN
    CLK_EXT0     : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=CLK_EXT0
    CLK_EXT1     : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=CLK_EXT1
    EXTSPI_CS_N0 : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=EXTSPI_CS_N0
    EXTSPI_CS_N1 : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=EXTSPI_CS_N1
    EXTSPI_DIN   : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=EXTSPI_DIN
    EXTSPI_DOUT  : In    STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=EXTSPI_DOUT
    EXTSPI_SCLK  : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=EXTSPI_SCLK
    N_BUS_IO_SEL : In    STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=N_BUS_IO_SEL
    ONE_WIRE_ID  : InOut STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=ONE_WIRE_ID
    PBIO0        : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=PBIO0
    PBIO1        : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=PBIO1
    PBIO2        : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=PBIO2
    PBIO3        : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=PBIO3
    PBIO4        : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=PBIO4
    PBIO45       : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=PBIO45
    PBIO46       : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=PBIO46
    PBIO49       : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=PBIO49
    PROM_CS      : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=PROM_CS
    SCL          : InOut STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=SCL
    SDA          : InOut STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=SDA
    SDIO_DETECT  : In    STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=SDIO_DETECT
    SDIO_PROTECT : In    STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=SDIO_PROTECT
    SRAM_A       : Out   STD_LOGIC_VECTOR(16 DOWNTO 0);      -- ObjectKind=Port|PrimaryId=SRAM_A[16..0]
    SRAM_D       : InOut STD_LOGIC_VECTOR(7 DOWNTO 0);       -- ObjectKind=Port|PrimaryId=SRAM_D[7..0]
    SRAM_NCS     : Out   STD_LOGIC_VECTOR(1 DOWNTO 0);       -- ObjectKind=Port|PrimaryId=SRAM_NCS[1..0]
    SRAM_NOE     : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=SRAM_NOE
    SRAM_NWE     : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=SRAM_NWE
    SYSCLK       : In    STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=SYSCLK
    TCK_SOFT     : In    STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=TCK_SOFT
    TDI_SOFT     : In    STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=TDI_SOFT
    TDO_SOFT     : Out   STD_LOGIC;                          -- ObjectKind=Port|PrimaryId=TDO_SOFT
    TMS_SOFT     : In    STD_LOGIC                           -- ObjectKind=Port|PrimaryId=TMS_SOFT
  );
  attribute MacroCell : boolean;

  attribute FPGA_CLOCK : string;
  attribute FPGA_CLOCK of TCK_SOFT : Signal is "True";

  attribute FPGA_CLOCK_ALLOW_ON_NON_CLOCK_PIN : string;
  attribute FPGA_CLOCK_ALLOW_ON_NON_CLOCK_PIN of BUS_7M       : Signal is "True";
  attribute FPGA_CLOCK_ALLOW_ON_NON_CLOCK_PIN of BUS_PHASE0   : Signal is "True";
  attribute FPGA_CLOCK_ALLOW_ON_NON_CLOCK_PIN of BUS_PHASE1   : Signal is "True";
  attribute FPGA_CLOCK_ALLOW_ON_NON_CLOCK_PIN of BUS_R_W      : Signal is "True";
  attribute FPGA_CLOCK_ALLOW_ON_NON_CLOCK_PIN of N_BUS_IO_SEL : Signal is "True";

  attribute FPGA_PULLUP : string;
  attribute FPGA_PULLUP of BUS_D0     : Signal is "True";
  attribute FPGA_PULLUP of BUS_D1     : Signal is "True";
  attribute FPGA_PULLUP of BUS_D2     : Signal is "True";
  attribute FPGA_PULLUP of BUS_D3     : Signal is "True";
  attribute FPGA_PULLUP of BUS_D4     : Signal is "True";
  attribute FPGA_PULLUP of BUS_D5     : Signal is "True";
  attribute FPGA_PULLUP of BUS_D6     : Signal is "True";
  attribute FPGA_PULLUP of BUS_D7     : Signal is "True";
  attribute FPGA_PULLUP of BUS_DMA    : Signal is "True";
  attribute FPGA_PULLUP of BUS_DMAIN  : Signal is "True";
  attribute FPGA_PULLUP of BUS_DMAOUT : Signal is "True";
  attribute FPGA_PULLUP of BUS_IRQ    : Signal is "True";
  attribute FPGA_PULLUP of BUS_NMI    : Signal is "True";
  attribute FPGA_PULLUP of BUS_R_W    : Signal is "True";
  attribute FPGA_PULLUP of BUS_RDY    : Signal is "True";

  attribute IsUserConfigurable : string;
  attribute IsUserConfigurable of PBA03_FPGA : Entity is "";

  attribute VersionControl_RevNumber : string;
  attribute VersionControl_RevNumber of PBA03_FPGA : Entity is "";


End PBA03_FPGA;
------------------------------------------------------------

------------------------------------------------------------
architecture structure of PBA03_FPGA is
   Component BUFT4S                                          -- ObjectKind=Part|PrimaryId=U40|SecondaryId=1
      port
      (
        I0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U40-I0
        I1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U40-I1
        I2 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U40-I2
        I3 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U40-I3
        O0 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U40-O0
        O1 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U40-O1
        O2 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U40-O2
        O3 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U40-O3
        T  : in  STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U40-T
      );
   End Component;

   Component BUFT6S                                          -- ObjectKind=Part|PrimaryId=U26|SecondaryId=1
      port
      (
        I0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U26-I0
        I1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U26-I1
        I2 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U26-I2
        I3 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U26-I3
        I4 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U26-I4
        I5 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U26-I5
        O0 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U26-O0
        O1 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U26-O1
        O2 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U26-O2
        O3 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U26-O3
        O4 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U26-O4
        O5 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U26-O5
        T  : in  STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U26-T
      );
   End Component;

   Component CDIV2                                           -- ObjectKind=Part|PrimaryId=U69|SecondaryId=1
      port
      (
        CLKDV : out STD_LOGIC;                               -- ObjectKind=Pin|PrimaryId=U69-CLKDV
        CLKIN : in  STD_LOGIC                                -- ObjectKind=Pin|PrimaryId=U69-CLKIN
      );
   End Component;

   Component Clock_CLK1                                      -- ObjectKind=Part|PrimaryId=CLK1|SecondaryId=1
      port
      (
        CLK    : in  STD_LOGIC;                              -- ObjectKind=Pin|PrimaryId=CLK1-CLK
        CLKA   : out STD_LOGIC;                              -- ObjectKind=Pin|PrimaryId=CLK1-CLKA
        CLKO   : out STD_LOGIC;                              -- ObjectKind=Pin|PrimaryId=CLK1-CLKO
        LOCKED : out STD_LOGIC;                              -- ObjectKind=Pin|PrimaryId=CLK1-LOCKED
        RST    : in  STD_LOGIC                               -- ObjectKind=Pin|PrimaryId=CLK1-RST
      );
   End Component;

   Component Configurable_SOFTCARD1                          -- ObjectKind=Part|PrimaryId=SOFTCARD1|SecondaryId=1
      port
      (
        ACQUIRE_BUS  : in  STD_LOGIC;                        -- ObjectKind=Pin|PrimaryId=SOFTCARD1-ACQUIRE_BUS
        AP_BUS_DMA   : in  STD_LOGIC;                        -- ObjectKind=Pin|PrimaryId=SOFTCARD1-AP_BUS_DMA
        BUS_DMA_OUT  : in  STD_LOGIC;                        -- ObjectKind=Pin|PrimaryId=SOFTCARD1-BUS_DMA_OUT
        CARD_ON      : in  STD_LOGIC;                        -- ObjectKind=Pin|PrimaryId=SOFTCARD1-CARD_ON
        TCK          : in  STD_LOGIC;                        -- ObjectKind=Pin|PrimaryId=SOFTCARD1-TCK
        TDI          : in  STD_LOGIC;                        -- ObjectKind=Pin|PrimaryId=SOFTCARD1-TDI
        TDO          : out STD_LOGIC;                        -- ObjectKind=Pin|PrimaryId=SOFTCARD1-TDO
        TMS          : in  STD_LOGIC;                        -- ObjectKind=Pin|PrimaryId=SOFTCARD1-TMS
        TRST         : in  STD_LOGIC;                        -- ObjectKind=Pin|PrimaryId=SOFTCARD1-TRST
        WR_ADD_APBUS : in  STD_LOGIC;                        -- ObjectKind=Pin|PrimaryId=SOFTCARD1-WR_ADD_APBUS
        WR_DAT_APBUS : in  STD_LOGIC                         -- ObjectKind=Pin|PrimaryId=SOFTCARD1-WR_DAT_APBUS
      );
   End Component;

   Component Configurable_U2                                 -- ObjectKind=Part|PrimaryId=U2|SecondaryId=1
      port
      (
        I : in  STD_LOGIC;                                   -- ObjectKind=Pin|PrimaryId=U2-I
        O : out STD_LOGIC                                    -- ObjectKind=Pin|PrimaryId=U2-O
      );
   End Component;

   Component Configurable_U3                                 -- ObjectKind=Part|PrimaryId=U3|SecondaryId=1
      port
      (
        I0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U3-I0
        I1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U3-I1
        I2 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U3-I2
        I3 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U3-I3
        O  : out STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U3-O
      );
   End Component;

   Component Configurable_U7                                 -- ObjectKind=Part|PrimaryId=U7|SecondaryId=1
      port
      (
        C   : in  STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U7-C
        CLR : in  STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U7-CLR
        D   : in  STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U7-D
        Q   : out STD_LOGIC                                  -- ObjectKind=Pin|PrimaryId=U7-Q
      );
   End Component;

   Component Configurable_U8                                 -- ObjectKind=Part|PrimaryId=U8|SecondaryId=1
      port
      (
        I0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U8-I0
        I1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U8-I1
        O  : out STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U8-O
      );
   End Component;

   Component Configurable_U9                                 -- ObjectKind=Part|PrimaryId=U9|SecondaryId=1
      port
      (
        I0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U9-I0
        I1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U9-I1
        O  : out STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U9-O
      );
   End Component;

   Component Configurable_U10                                -- ObjectKind=Part|PrimaryId=U10|SecondaryId=1
      port
      (
        I : in  STD_LOGIC;                                   -- ObjectKind=Pin|PrimaryId=U10-I
        O : out STD_LOGIC                                    -- ObjectKind=Pin|PrimaryId=U10-O
      );
   End Component;

   Component Configurable_U11                                -- ObjectKind=Part|PrimaryId=U11|SecondaryId=1
      port
      (
        I0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U11-I0
        I1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U11-I1
        O  : out STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U11-O
      );
   End Component;

   Component Configurable_U12                                -- ObjectKind=Part|PrimaryId=U12|SecondaryId=1
      port
      (
        I0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U12-I0
        I1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U12-I1
        O  : out STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U12-O
      );
   End Component;

   Component Configurable_U14                                -- ObjectKind=Part|PrimaryId=U14|SecondaryId=1
      port
      (
        I : in  STD_LOGIC;                                   -- ObjectKind=Pin|PrimaryId=U14-I
        O : out STD_LOGIC                                    -- ObjectKind=Pin|PrimaryId=U14-O
      );
   End Component;

   Component Configurable_U15                                -- ObjectKind=Part|PrimaryId=U15|SecondaryId=1
      port
      (
        I : in  STD_LOGIC;                                   -- ObjectKind=Pin|PrimaryId=U15-I
        O : out STD_LOGIC                                    -- ObjectKind=Pin|PrimaryId=U15-O
      );
   End Component;

   Component Configurable_U17                                -- ObjectKind=Part|PrimaryId=U17|SecondaryId=1
      port
      (
        I0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U17-I0
        I1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U17-I1
        O  : out STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U17-O
      );
   End Component;

   Component Configurable_U18                                -- ObjectKind=Part|PrimaryId=U18|SecondaryId=1
      port
      (
        I : in  STD_LOGIC_VECTOR(7 downto 0);                -- ObjectKind=Pin|PrimaryId=U18-I[7..0]
        O : out STD_LOGIC_VECTOR(7 downto 0)                 -- ObjectKind=Pin|PrimaryId=U18-O[7..0]
      );
   End Component;

   Component Configurable_U20                                -- ObjectKind=Part|PrimaryId=U20|SecondaryId=1
      port
      (
        I0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U20-I0
        I1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U20-I1
        I2 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U20-I2
        I3 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U20-I3
        O  : out STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U20-O
      );
   End Component;

   Component Configurable_U22                                -- ObjectKind=Part|PrimaryId=U22|SecondaryId=1
      port
      (
        I0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U22-I0
        I1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U22-I1
        O  : out STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U22-O
      );
   End Component;

   Component Configurable_U23                                -- ObjectKind=Part|PrimaryId=U23|SecondaryId=1
      port
      (
        I0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U23-I0
        I1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U23-I1
        I2 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U23-I2
        I3 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U23-I3
        O  : out STD_LOGIC_VECTOR(3 downto 0)                -- ObjectKind=Pin|PrimaryId=U23-O[3..0]
      );
   End Component;

   Component Configurable_U25                                -- ObjectKind=Part|PrimaryId=U25|SecondaryId=1
      port
      (
        I0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U25-I0
        I1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U25-I1
        O  : out STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U25-O
      );
   End Component;

   Component Configurable_U29                                -- ObjectKind=Part|PrimaryId=U29|SecondaryId=1
      port
      (
        I0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U29-I0
        I1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U29-I1
        O  : out STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U29-O
      );
   End Component;

   Component Configurable_U30                                -- ObjectKind=Part|PrimaryId=U30|SecondaryId=1
      port
      (
        A  : in  STD_LOGIC_VECTOR(3 downto 0);               -- ObjectKind=Pin|PrimaryId=U30-A[3..0]
        B  : in  STD_LOGIC_VECTOR(3 downto 0);               -- ObjectKind=Pin|PrimaryId=U30-B[3..0]
        CI : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U30-CI
        S  : out STD_LOGIC_VECTOR(3 downto 0)                -- ObjectKind=Pin|PrimaryId=U30-S[3..0]
      );
   End Component;

   Component Configurable_U31                                -- ObjectKind=Part|PrimaryId=U31|SecondaryId=1
      port
      (
        I   : in  STD_LOGIC_VECTOR(15 downto 0);             -- ObjectKind=Pin|PrimaryId=U31-I[15..0]
        O0  : out STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U31-O0
        O1  : out STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U31-O1
        O2  : out STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U31-O2
        O3  : out STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U31-O3
        O4  : out STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U31-O4
        O5  : out STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U31-O5
        O6  : out STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U31-O6
        O7  : out STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U31-O7
        O8  : out STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U31-O8
        O9  : out STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U31-O9
        O10 : out STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U31-O10
        O11 : out STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U31-O11
        O12 : out STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U31-O12
        O13 : out STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U31-O13
        O14 : out STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U31-O14
        O15 : out STD_LOGIC                                  -- ObjectKind=Pin|PrimaryId=U31-O15
      );
   End Component;

   Component Configurable_U33                                -- ObjectKind=Part|PrimaryId=U33|SecondaryId=1
      port
      (
        I0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U33-I0
        I1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U33-I1
        I2 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U33-I2
        I3 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U33-I3
        O  : out STD_LOGIC_VECTOR(3 downto 0)                -- ObjectKind=Pin|PrimaryId=U33-O[3..0]
      );
   End Component;

   Component Configurable_U34                                -- ObjectKind=Part|PrimaryId=U34|SecondaryId=1
      port
      (
        I  : in  STD_LOGIC_VECTOR(7 downto 0);               -- ObjectKind=Pin|PrimaryId=U34-I[7..0]
        O0 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U34-O0
        O1 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U34-O1
        O2 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U34-O2
        O3 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U34-O3
        O4 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U34-O4
        O5 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U34-O5
        O6 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U34-O6
        O7 : out STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U34-O7
      );
   End Component;

   Component Configurable_U42                                -- ObjectKind=Part|PrimaryId=U42|SecondaryId=1
      port
      (
        D0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U42-D0
        D1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U42-D1
        D2 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U42-D2
        D3 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U42-D3
        D4 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U42-D4
        D5 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U42-D5
        D6 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U42-D6
        D7 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U42-D7
        G  : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U42-G
        Q0 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U42-Q0
        Q1 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U42-Q1
        Q2 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U42-Q2
        Q3 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U42-Q3
        Q4 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U42-Q4
        Q5 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U42-Q5
        Q6 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U42-Q6
        Q7 : out STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U42-Q7
      );
   End Component;

   Component Configurable_U43                                -- ObjectKind=Part|PrimaryId=U43|SecondaryId=1
      port
      (
        I0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U43-I0
        I1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U43-I1
        I2 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U43-I2
        I3 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U43-I3
        I4 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U43-I4
        I5 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U43-I5
        I6 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U43-I6
        I7 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U43-I7
        O  : out STD_LOGIC_VECTOR(7 downto 0)                -- ObjectKind=Pin|PrimaryId=U43-O[7..0]
      );
   End Component;

   Component Configurable_U45                                -- ObjectKind=Part|PrimaryId=U45|SecondaryId=1
      port
      (
        C   : in  STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U45-C
        CLR : in  STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U45-CLR
        D   : in  STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U45-D
        Q   : out STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U45-Q
        QN  : out STD_LOGIC                                  -- ObjectKind=Pin|PrimaryId=U45-QN
      );
   End Component;

   Component Configurable_U46                                -- ObjectKind=Part|PrimaryId=U46|SecondaryId=1
      port
      (
        C   : in  STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U46-C
        CLR : in  STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U46-CLR
        D   : in  STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U46-D
        Q   : out STD_LOGIC                                  -- ObjectKind=Pin|PrimaryId=U46-Q
      );
   End Component;

   Component Configurable_U47                                -- ObjectKind=Part|PrimaryId=U47|SecondaryId=1
      port
      (
        I0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U47-I0
        I1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U47-I1
        O  : out STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U47-O
      );
   End Component;

   Component Configurable_U48                                -- ObjectKind=Part|PrimaryId=U48|SecondaryId=1
      port
      (
        C : in  STD_LOGIC;                                   -- ObjectKind=Pin|PrimaryId=U48-C
        D : in  STD_LOGIC;                                   -- ObjectKind=Pin|PrimaryId=U48-D
        Q : out STD_LOGIC                                    -- ObjectKind=Pin|PrimaryId=U48-Q
      );
   End Component;

   Component Configurable_U49                                -- ObjectKind=Part|PrimaryId=U49|SecondaryId=1
      port
      (
        C : in  STD_LOGIC;                                   -- ObjectKind=Pin|PrimaryId=U49-C
        D : in  STD_LOGIC;                                   -- ObjectKind=Pin|PrimaryId=U49-D
        Q : out STD_LOGIC                                    -- ObjectKind=Pin|PrimaryId=U49-Q
      );
   End Component;

   Component Configurable_U50                                -- ObjectKind=Part|PrimaryId=U50|SecondaryId=1
      port
      (
        I : in  STD_LOGIC;                                   -- ObjectKind=Pin|PrimaryId=U50-I
        O : out STD_LOGIC                                    -- ObjectKind=Pin|PrimaryId=U50-O
      );
   End Component;

   Component Configurable_U51                                -- ObjectKind=Part|PrimaryId=U51|SecondaryId=1
      port
      (
        I0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U51-I0
        I1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U51-I1
        O  : out STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U51-O
      );
   End Component;

   Component Configurable_U52                                -- ObjectKind=Part|PrimaryId=U52|SecondaryId=1
      port
      (
        I : in  STD_LOGIC;                                   -- ObjectKind=Pin|PrimaryId=U52-I
        O : out STD_LOGIC                                    -- ObjectKind=Pin|PrimaryId=U52-O
      );
   End Component;

   Component Configurable_U53                                -- ObjectKind=Part|PrimaryId=U53|SecondaryId=1
      port
      (
        I : in  STD_LOGIC;                                   -- ObjectKind=Pin|PrimaryId=U53-I
        O : out STD_LOGIC                                    -- ObjectKind=Pin|PrimaryId=U53-O
      );
   End Component;

   Component Configurable_U55                                -- ObjectKind=Part|PrimaryId=U55|SecondaryId=1
      port
      (
        I0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U55-I0
        I1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U55-I1
        O  : out STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U55-O
      );
   End Component;

   Component Configurable_U56                                -- ObjectKind=Part|PrimaryId=U56|SecondaryId=1
      port
      (
        I : in  STD_LOGIC;                                   -- ObjectKind=Pin|PrimaryId=U56-I
        O : out STD_LOGIC                                    -- ObjectKind=Pin|PrimaryId=U56-O
      );
   End Component;

   Component Configurable_U58                                -- ObjectKind=Part|PrimaryId=U58|SecondaryId=1
      port
      (
        C : in  STD_LOGIC;                                   -- ObjectKind=Pin|PrimaryId=U58-C
        D : in  STD_LOGIC;                                   -- ObjectKind=Pin|PrimaryId=U58-D
        Q : out STD_LOGIC                                    -- ObjectKind=Pin|PrimaryId=U58-Q
      );
   End Component;

   Component Configurable_U59                                -- ObjectKind=Part|PrimaryId=U59|SecondaryId=1
      port
      (
        I0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U59-I0
        I1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U59-I1
        O  : out STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U59-O
      );
   End Component;

   Component Configurable_U60                                -- ObjectKind=Part|PrimaryId=U60|SecondaryId=1
      port
      (
        I0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U60-I0
        I1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U60-I1
        O  : out STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U60-O
      );
   End Component;

   Component Configurable_U63                                -- ObjectKind=Part|PrimaryId=U63|SecondaryId=1
      port
      (
        I0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U63-I0
        I1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U63-I1
        O  : out STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U63-O
      );
   End Component;

   Component Configurable_U66                                -- ObjectKind=Part|PrimaryId=U66|SecondaryId=1
      port
      (
        I : in  STD_LOGIC;                                   -- ObjectKind=Pin|PrimaryId=U66-I
        O : out STD_LOGIC                                    -- ObjectKind=Pin|PrimaryId=U66-O
      );
   End Component;

   Component Configurable_U67                                -- ObjectKind=Part|PrimaryId=U67|SecondaryId=1
      port
      (
        I : in  STD_LOGIC;                                   -- ObjectKind=Pin|PrimaryId=U67-I
        O : out STD_LOGIC                                    -- ObjectKind=Pin|PrimaryId=U67-O
      );
   End Component;

   Component Configurable_U68                                -- ObjectKind=Part|PrimaryId=U68|SecondaryId=1
      port
      (
        I : in  STD_LOGIC;                                   -- ObjectKind=Pin|PrimaryId=U68-I
        O : out STD_LOGIC                                    -- ObjectKind=Pin|PrimaryId=U68-O
      );
   End Component;

   Component Configurable_U70                                -- ObjectKind=Part|PrimaryId=U70|SecondaryId=1
      port
      (
        I : in  STD_LOGIC;                                   -- ObjectKind=Pin|PrimaryId=U70-I
        O : out STD_LOGIC                                    -- ObjectKind=Pin|PrimaryId=U70-O
      );
   End Component;

   Component Configurable_Z1                                 -- ObjectKind=Part|PrimaryId=Z1|SecondaryId=1
      port
      (
        BUS_7M      : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-BUS_7M
        BUS_PHASE0  : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-BUS_PHASE0
        BUS_PHASE1  : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-BUS_PHASE1
        CLK         : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-CLK
        CLK_CAP     : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-CLK_CAP
        DIN0        : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-DIN0
        DIN1        : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-DIN1
        DIN2        : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-DIN2
        DIN3        : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-DIN3
        DIN4        : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-DIN4
        DIN5        : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-DIN5
        DIN6        : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-DIN6
        DIN7        : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-DIN7
        EXT_TRIGGER : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-EXT_TRIGGER
        RWIN        : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-RWIN
        RWOUT       : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-RWOUT
        STATUS      : out STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-STATUS
        TCK         : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-TCK
        TDI         : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-TDI
        TDO         : out STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-TDO
        TMS         : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-TMS
        TRST        : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-TRST
        Z80_A0      : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-Z80_A0
        Z80_A1      : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-Z80_A1
        Z80_A2      : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-Z80_A2
        Z80_A3      : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-Z80_A3
        Z80_A4      : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-Z80_A4
        Z80_A5      : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-Z80_A5
        Z80_A6      : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-Z80_A6
        Z80_A7      : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-Z80_A7
        Z80_A8      : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-Z80_A8
        Z80_A9      : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-Z80_A9
        Z80_A10     : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-Z80_A10
        Z80_A11     : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-Z80_A11
        Z80_A12     : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-Z80_A12
        Z80_A13     : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-Z80_A13
        Z80_A14     : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-Z80_A14
        Z80_A15     : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z1-Z80_A15
        Z80CLK      : in  STD_LOGIC                          -- ObjectKind=Pin|PrimaryId=Z1-Z80CLK
      );
   End Component;

   Component Configurable_Z2                                 -- ObjectKind=Part|PrimaryId=Z2|SecondaryId=1
      port
      (
        BUS_REQ     : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z2-BUS_REQ
        BUSACK_Z80  : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z2-BUSACK_Z80
        HALT_Z80    : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z2-HALT_Z80
        M1_Z80      : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z2-M1_Z80
        NMI_Z80     : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z2-NMI_Z80
        RD_Z80      : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z2-RD_Z80
        REFRESH_Z80 : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z2-REFRESH_Z80
        RESET_Z80   : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z2-RESET_Z80
        TCK         : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z2-TCK
        TDI         : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z2-TDI
        TDO         : out STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z2-TDO
        TMS         : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z2-TMS
        TRST        : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z2-TRST
        WAIT_Z80    : in  STD_LOGIC;                         -- ObjectKind=Pin|PrimaryId=Z2-WAIT_Z80
        WR_Z80      : in  STD_LOGIC                          -- ObjectKind=Pin|PrimaryId=Z2-WR_Z80
      );
   End Component;

   Component FJKC_1                                          -- ObjectKind=Part|PrimaryId=U4|SecondaryId=1
      port
      (
        C   : in  STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U4-C
        CLR : in  STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U4-CLR
        J   : in  STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U4-J
        K   : in  STD_LOGIC;                                 -- ObjectKind=Pin|PrimaryId=U4-K
        Q   : out STD_LOGIC                                  -- ObjectKind=Pin|PrimaryId=U4-Q
      );
   End Component;

   Component FRQCNT2                                         -- ObjectKind=Part|PrimaryId=U1|SecondaryId=1
      port
      (
        FREQA    : in  STD_LOGIC;                            -- ObjectKind=Pin|PrimaryId=U1-FREQA
        FREQB    : in  STD_LOGIC;                            -- ObjectKind=Pin|PrimaryId=U1-FREQB
        TCK      : in  STD_LOGIC;                            -- ObjectKind=Pin|PrimaryId=U1-TCK
        TDI      : in  STD_LOGIC;                            -- ObjectKind=Pin|PrimaryId=U1-TDI
        TDO      : out STD_LOGIC;                            -- ObjectKind=Pin|PrimaryId=U1-TDO
        TIMEBASE : in  STD_LOGIC;                            -- ObjectKind=Pin|PrimaryId=U1-TIMEBASE
        TMS      : in  STD_LOGIC;                            -- ObjectKind=Pin|PrimaryId=U1-TMS
        TRST     : in  STD_LOGIC                             -- ObjectKind=Pin|PrimaryId=U1-TRST
      );
   End Component;

   Component IOBUF                                           -- ObjectKind=Part|PrimaryId=U6|SecondaryId=1
      port
      (
        I  : in    STD_LOGIC;                                -- ObjectKind=Pin|PrimaryId=U6-I
        IO : inout STD_LOGIC;                                -- ObjectKind=Pin|PrimaryId=U6-IO
        O  : out   STD_LOGIC;                                -- ObjectKind=Pin|PrimaryId=U6-O
        T  : in    STD_LOGIC                                 -- ObjectKind=Pin|PrimaryId=U6-T
      );
   End Component;

   Component J4B_4S                                          -- ObjectKind=Part|PrimaryId=U28|SecondaryId=1
      port
      (
        I  : in  STD_LOGIC_VECTOR(3 downto 0);               -- ObjectKind=Pin|PrimaryId=U28-I[3..0]
        O0 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U28-O0
        O1 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U28-O1
        O2 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U28-O2
        O3 : out STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U28-O3
      );
   End Component;

   Component J8B_8S                                          -- ObjectKind=Part|PrimaryId=U13|SecondaryId=1
      port
      (
        I  : in  STD_LOGIC_VECTOR(7 downto 0);               -- ObjectKind=Pin|PrimaryId=U13-I[7..0]
        O0 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U13-O0
        O1 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U13-O1
        O2 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U13-O2
        O3 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U13-O3
        O4 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U13-O4
        O5 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U13-O5
        O6 : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U13-O6
        O7 : out STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U13-O7
      );
   End Component;

   Component M1_S1B8E                                        -- ObjectKind=Part|PrimaryId=U16|SecondaryId=1
      port
      (
        D  : out STD_LOGIC_VECTOR(7 downto 0);               -- ObjectKind=Pin|PrimaryId=U16-D[7..0]
        E  : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U16-E
        O  : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U16-O
        S0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U16-S0
        S1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U16-S1
        S2 : in  STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U16-S2
      );
   End Component;

   Component M1_S2S1                                         -- ObjectKind=Part|PrimaryId=U19|SecondaryId=1
      port
      (
        D0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U19-D0
        D1 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U19-D1
        O  : out STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U19-O
        S0 : in  STD_LOGIC                                   -- ObjectKind=Pin|PrimaryId=U19-S0
      );
   End Component;

   Component M8_B2B1                                         -- ObjectKind=Part|PrimaryId=U44|SecondaryId=1
      port
      (
        A  : in  STD_LOGIC_VECTOR(7 downto 0);               -- ObjectKind=Pin|PrimaryId=U44-A[7..0]
        B  : in  STD_LOGIC_VECTOR(7 downto 0);               -- ObjectKind=Pin|PrimaryId=U44-B[7..0]
        S0 : in  STD_LOGIC;                                  -- ObjectKind=Pin|PrimaryId=U44-S0
        Y  : out STD_LOGIC_VECTOR(7 downto 0)                -- ObjectKind=Pin|PrimaryId=U44-Y[7..0]
      );
   End Component;

   Component tv80n                                           -- ObjectKind=Sheet Symbol|PrimaryId=U_Z80
      port
      (
        A       : out STD_LOGIC_VECTOR(15 downto 0);         -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-A[15..0]
        BUSAK_N : out STD_LOGIC;                             -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-BUSAK_N
        BUSRQ_N : in  STD_LOGIC;                             -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-BUSRQ_N
        CLK     : in  STD_LOGIC;                             -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-CLK
        DI      : in  STD_LOGIC_VECTOR(7 downto 0);          -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-DI[7..0]
        DO      : out STD_LOGIC_VECTOR(7 downto 0);          -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-DO[7..0]
        HALT_N  : out STD_LOGIC;                             -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-HALT_N
        INT_N   : in  STD_LOGIC;                             -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-INT_N
        IORQ_N  : out STD_LOGIC;                             -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-IORQ_N
        M1_N    : out STD_LOGIC;                             -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-M1_N
        MREQ_N  : out STD_LOGIC;                             -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-MREQ_N
        NMI_N   : in  STD_LOGIC;                             -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-NMI_N
        RD_N    : out STD_LOGIC;                             -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-RD_N
        RESET_N : in  STD_LOGIC;                             -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-RESET_N
        RFSH_N  : out STD_LOGIC;                             -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-RFSH_N
        WAIT_N  : in  STD_LOGIC;                             -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-WAIT_N
        WR_N    : out STD_LOGIC                              -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-WR_N
      );
   End Component;


    Signal NamedSignal_ACQUIREBUS      : STD_LOGIC; -- ObjectKind=Net|PrimaryId=ACQUIREBUS
    Signal NamedSignal_APDMA           : STD_LOGIC; -- ObjectKind=Net|PrimaryId=APDMA
    Signal NamedSignal_BDMAO           : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BDMAO
    Signal NamedSignal_BUS_7M          : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BUS_7M
    Signal NamedSignal_BUS_PHASE0      : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BUS_PHASE0
    Signal NamedSignal_BUS_PHASE1      : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BUS_PHASE1
    Signal NamedSignal_CARDON          : STD_LOGIC; -- ObjectKind=Net|PrimaryId=CARDON
    Signal NamedSignal_CLK50           : STD_LOGIC; -- ObjectKind=Net|PrimaryId=CLK50
    Signal NamedSignal_DIN0            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DIN0
    Signal NamedSignal_DIN1            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DIN1
    Signal NamedSignal_DIN2            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DIN2
    Signal NamedSignal_DIN3            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DIN3
    Signal NamedSignal_DIN4            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DIN4
    Signal NamedSignal_DIN5            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DIN5
    Signal NamedSignal_DIN6            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DIN6
    Signal NamedSignal_DIN7            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DIN7
    Signal NamedSignal_JTAG_NEXUS_TRST : STD_LOGIC; -- ObjectKind=Net|PrimaryId=SRAM_NCS1
    Signal NamedSignal_PIN17           : STD_LOGIC; -- ObjectKind=Net|PrimaryId=PIN17
    Signal NamedSignal_PIN18           : STD_LOGIC; -- ObjectKind=Net|PrimaryId=PIN18
    Signal NamedSignal_PIN21           : STD_LOGIC; -- ObjectKind=Net|PrimaryId=PIN21
    Signal NamedSignal_PIN22           : STD_LOGIC; -- ObjectKind=Net|PrimaryId=PIN22
    Signal NamedSignal_PIN23           : STD_LOGIC; -- ObjectKind=Net|PrimaryId=PIN23
    Signal NamedSignal_PIN24           : STD_LOGIC; -- ObjectKind=Net|PrimaryId=PIN24
    Signal NamedSignal_PIN25           : STD_LOGIC; -- ObjectKind=Net|PrimaryId=PIN25
    Signal NamedSignal_PIN26           : STD_LOGIC; -- ObjectKind=Net|PrimaryId=PIN26
    Signal NamedSignal_PIN27           : STD_LOGIC; -- ObjectKind=Net|PrimaryId=PIN27
    Signal NamedSignal_PIN28           : STD_LOGIC; -- ObjectKind=Net|PrimaryId=PIN28
    Signal NamedSignal_RWIN            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=RWIN
    Signal NamedSignal_RWOUT           : STD_LOGIC; -- ObjectKind=Net|PrimaryId=RWOUT
    Signal NamedSignal_SRAM_A          : STD_LOGIC_VECTOR(16 downto 0); -- ObjectKind=Net|PrimaryId=SRAM_A[16..0]
    Signal NamedSignal_SRAM_NCS        : STD_LOGIC_VECTOR(1 downto 0); -- ObjectKind=Net|PrimaryId=SRAM_NCS[1..0]
    Signal NamedSignal_SRAM_NOE        : STD_LOGIC; -- ObjectKind=Net|PrimaryId=SRAM_NCS1
    Signal NamedSignal_SRAM_NWE        : STD_LOGIC; -- ObjectKind=Net|PrimaryId=SRAM_NCS1
    Signal NamedSignal_SYSCLK          : STD_LOGIC; -- ObjectKind=Net|PrimaryId=SYSCLK
    Signal NamedSignal_VCC1_BUS        : STD_LOGIC_VECTOR(7 downto 0); -- ObjectKind=Net|PrimaryId=VCC1_BUS[7..0]
    Signal NamedSignal_WR_APADD        : STD_LOGIC; -- ObjectKind=Net|PrimaryId=WR_APADD
    Signal NamedSignal_WR_APDATA       : STD_LOGIC; -- ObjectKind=Net|PrimaryId=WR_APDATA
    Signal NamedSignal_Z80_A0          : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A0
    Signal NamedSignal_Z80_A1          : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A1
    Signal NamedSignal_Z80_A10         : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A10
    Signal NamedSignal_Z80_A11         : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A11
    Signal NamedSignal_Z80_A12         : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A12
    Signal NamedSignal_Z80_A13         : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A13
    Signal NamedSignal_Z80_A14         : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A14
    Signal NamedSignal_Z80_A15         : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A15
    Signal NamedSignal_Z80_A2          : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A2
    Signal NamedSignal_Z80_A3          : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A3
    Signal NamedSignal_Z80_A4          : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A4
    Signal NamedSignal_Z80_A5          : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A5
    Signal NamedSignal_Z80_A6          : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A6
    Signal NamedSignal_Z80_A7          : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A7
    Signal NamedSignal_Z80_A8          : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A8
    Signal NamedSignal_Z80_A9          : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A9
    Signal NamedSignal_Z80CLK          : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80CLK
    Signal PinSignal_CLK1_CLKA         : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetCLK1_CLKA
    Signal PinSignal_SOFTCARD1_TDO     : STD_LOGIC; -- ObjectKind=Net|PrimaryId=JTAG_NEXUS_LINK0
    Signal PinSignal_U_Z80_A           : STD_LOGIC_VECTOR(15 downto 0); -- ObjectKind=Net|PrimaryId=NetU31_I[15..0]
    Signal PinSignal_U_Z80_BUSAK_N     : STD_LOGIC; -- ObjectKind=Net|PrimaryId=PIN23
    Signal PinSignal_U_Z80_DO          : STD_LOGIC_VECTOR(7 downto 0); -- ObjectKind=Net|PrimaryId=NetU34_I[7..0]
    Signal PinSignal_U_Z80_HALT_N      : STD_LOGIC; -- ObjectKind=Net|PrimaryId=PIN18
    Signal PinSignal_U_Z80_IORQ_N      : STD_LOGIC; -- ObjectKind=Net|PrimaryId=PIN20
    Signal PinSignal_U_Z80_M1_N        : STD_LOGIC; -- ObjectKind=Net|PrimaryId=PIN27
    Signal PinSignal_U_Z80_MREQ_N      : STD_LOGIC; -- ObjectKind=Net|PrimaryId=PIN19
    Signal PinSignal_U_Z80_RD_N        : STD_LOGIC; -- ObjectKind=Net|PrimaryId=PIN21
    Signal PinSignal_U_Z80_RFSH_N      : STD_LOGIC; -- ObjectKind=Net|PrimaryId=PIN28
    Signal PinSignal_U_Z80_WR_N        : STD_LOGIC; -- ObjectKind=Net|PrimaryId=PIN22
    Signal PinSignal_U1_TDO            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=JTAG_NEXUS_LINK1
    Signal PinSignal_U10_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU10_O
    Signal PinSignal_U11_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU11_O
    Signal PinSignal_U12_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU5_C
    Signal PinSignal_U13_O3            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU13_O3
    Signal PinSignal_U13_O4            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU13_O4
    Signal PinSignal_U13_O5            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU13_O5
    Signal PinSignal_U13_O6            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU13_O6
    Signal PinSignal_U14_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BUS_7M
    Signal PinSignal_U15_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU7_CLR
    Signal PinSignal_U16_D             : STD_LOGIC_VECTOR(7 downto 0); -- ObjectKind=Net|PrimaryId=NetU16_D[7..0]
    Signal PinSignal_U17_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=WR_APDATA
    Signal PinSignal_U18_O             : STD_LOGIC_VECTOR(7 downto 0); -- ObjectKind=Net|PrimaryId=NetU13_I[7..0]
    Signal PinSignal_U19_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU9_I1
    Signal PinSignal_U2_O              : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BUS_PHASE1
    Signal PinSignal_U20_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU20_O
    Signal PinSignal_U21_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU21_O
    Signal PinSignal_U22_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU22_O
    Signal PinSignal_U23_O             : STD_LOGIC_VECTOR(3 downto 0); -- ObjectKind=Net|PrimaryId=NetU23_O[3..0]
    Signal PinSignal_U24_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU24_O
    Signal PinSignal_U25_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU23_I2
    Signal PinSignal_U26_O0            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BUS_A10
    Signal PinSignal_U26_O1            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BUS_A11
    Signal PinSignal_U26_O2            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BUS_A12
    Signal PinSignal_U26_O3            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BUS_A13
    Signal PinSignal_U26_O4            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BUS_A14
    Signal PinSignal_U26_O5            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BUS_A15
    Signal PinSignal_U27_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU27_O
    Signal PinSignal_U28_O0            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A12
    Signal PinSignal_U28_O1            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A13
    Signal PinSignal_U28_O2            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A14
    Signal PinSignal_U28_O3            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A15
    Signal PinSignal_U29_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU23_I0
    Signal PinSignal_U3_O              : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80CLK
    Signal PinSignal_U30_S             : STD_LOGIC_VECTOR(3 downto 0); -- ObjectKind=Net|PrimaryId=NetU28_I[3..0]
    Signal PinSignal_U31_O0            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A0
    Signal PinSignal_U31_O1            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A1
    Signal PinSignal_U31_O10           : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A10
    Signal PinSignal_U31_O11           : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A11
    Signal PinSignal_U31_O12           : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU16_S0
    Signal PinSignal_U31_O13           : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU16_S1
    Signal PinSignal_U31_O14           : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU16_S2
    Signal PinSignal_U31_O15           : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU11_I1
    Signal PinSignal_U31_O2            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A2
    Signal PinSignal_U31_O3            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A3
    Signal PinSignal_U31_O4            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A4
    Signal PinSignal_U31_O5            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A5
    Signal PinSignal_U31_O6            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A6
    Signal PinSignal_U31_O7            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A7
    Signal PinSignal_U31_O8            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A8
    Signal PinSignal_U31_O9            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Z80_A9
    Signal PinSignal_U32_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU32_O
    Signal PinSignal_U33_O             : STD_LOGIC_VECTOR(3 downto 0); -- ObjectKind=Net|PrimaryId=NetU30_B[3..0]
    Signal PinSignal_U34_O0            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DOUT0
    Signal PinSignal_U34_O1            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DOUT1
    Signal PinSignal_U34_O2            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DOUT2
    Signal PinSignal_U34_O3            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DOUT3
    Signal PinSignal_U34_O4            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DOUT4
    Signal PinSignal_U34_O5            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DOUT5
    Signal PinSignal_U34_O6            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DOUT6
    Signal PinSignal_U34_O7            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DOUT7
    Signal PinSignal_U35_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU35_O
    Signal PinSignal_U36_O0            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BUS_A4
    Signal PinSignal_U36_O1            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BUS_A5
    Signal PinSignal_U36_O2            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BUS_A6
    Signal PinSignal_U36_O3            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BUS_A7
    Signal PinSignal_U36_O4            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BUS_A8
    Signal PinSignal_U36_O5            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BUS_A9
    Signal PinSignal_U37_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU37_O
    Signal PinSignal_U38_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=PIN25
    Signal PinSignal_U39_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU39_O
    Signal PinSignal_U4_Q              : STD_LOGIC; -- ObjectKind=Net|PrimaryId=B
    Signal PinSignal_U40_O0            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BUS_A0
    Signal PinSignal_U40_O1            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BUS_A1
    Signal PinSignal_U40_O2            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BUS_A2
    Signal PinSignal_U40_O3            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BUS_A3
    Signal PinSignal_U41_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU41_O
    Signal PinSignal_U42_Q0            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DIN0
    Signal PinSignal_U42_Q1            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DIN1
    Signal PinSignal_U42_Q2            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DIN2
    Signal PinSignal_U42_Q3            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DIN3
    Signal PinSignal_U42_Q4            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DIN4
    Signal PinSignal_U42_Q5            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DIN5
    Signal PinSignal_U42_Q6            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DIN6
    Signal PinSignal_U42_Q7            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=DIN7
    Signal PinSignal_U43_O             : STD_LOGIC_VECTOR(7 downto 0); -- ObjectKind=Net|PrimaryId=NetU43_O[7..0]
    Signal PinSignal_U44_Y             : STD_LOGIC_VECTOR(7 downto 0); -- ObjectKind=Net|PrimaryId=NetU44_Y[7..0]
    Signal PinSignal_U45_Q             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU45_Q
    Signal PinSignal_U45_QN            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=CARDON
    Signal PinSignal_U46_Q             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=PIN24
    Signal PinSignal_U47_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=CARDONCLK
    Signal PinSignal_U48_Q             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU45_C
    Signal PinSignal_U49_Q             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=N_BUS_IO_SEL
    Signal PinSignal_U5_Q              : STD_LOGIC; -- ObjectKind=Net|PrimaryId=A
    Signal PinSignal_U50_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU50_O
    Signal PinSignal_U51_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU50_I
    Signal PinSignal_U52_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU46_CLR
    Signal PinSignal_U53_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU45_CLR
    Signal PinSignal_U54_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BDMAO
    Signal PinSignal_U55_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU55_O
    Signal PinSignal_U56_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU56_O
    Signal PinSignal_U57_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=APDMA
    Signal PinSignal_U58_Q             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=PIN26
    Signal PinSignal_U59_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU59_O
    Signal PinSignal_U6_O              : STD_LOGIC; -- ObjectKind=Net|PrimaryId=RWIN
    Signal PinSignal_U60_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU56_I
    Signal PinSignal_U61_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=PIN16
    Signal PinSignal_U63_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=WR_APADD
    Signal PinSignal_U64_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU63_I0
    Signal PinSignal_U65_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=PIN17
    Signal PinSignal_U66_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=ACQUIREBUS
    Signal PinSignal_U67_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=BUS_PHASE0
    Signal PinSignal_U68_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=SYS_14MHZ_CLK
    Signal PinSignal_U69_CLKDV         : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU69_CLKDV
    Signal PinSignal_U7_Q              : STD_LOGIC; -- ObjectKind=Net|PrimaryId=RWOUT
    Signal PinSignal_U70_O             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=CLK50
    Signal PinSignal_U8_O              : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU4_K
    Signal PinSignal_U9_O              : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU9_O
    Signal PinSignal_Z1_TDO            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=JTAG_NEXUS_LINK2
    Signal PinSignal_Z2_TDO            : STD_LOGIC; -- ObjectKind=Net|PrimaryId=JTAG_NEXUS_TDO
    Signal PowerSignal_GND             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=SRAM_A16
    Signal PowerSignal_VCC             : STD_LOGIC; -- ObjectKind=Net|PrimaryId=SRAM_NCS1





   attribute UNDEFINED : string;
   attribute UNDEFINED of U_Z80 : Label is "tv80n";



begin
    U_Z80 : tv80n                                            -- ObjectKind=Sheet Symbol|PrimaryId=U_Z80
      Port Map
      (
        A       => PinSignal_U_Z80_A,                        -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-A[15..0]
        BUSAK_N => PinSignal_U_Z80_BUSAK_N,                  -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-BUSAK_N
        BUSRQ_N => PinSignal_U38_O,                          -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-BUSRQ_N
        CLK     => PinSignal_U3_O,                           -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-CLK
        DI      => PinSignal_U44_Y,                          -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-DI[7..0]
        DO      => PinSignal_U_Z80_DO,                       -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-DO[7..0]
        HALT_N  => PinSignal_U_Z80_HALT_N,                   -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-HALT_N
        INT_N   => PinSignal_U61_O,                          -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-INT_N
        IORQ_N  => PinSignal_U_Z80_IORQ_N,                   -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-IORQ_N
        M1_N    => PinSignal_U_Z80_M1_N,                     -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-M1_N
        MREQ_N  => PinSignal_U_Z80_MREQ_N,                   -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-MREQ_N
        NMI_N   => PinSignal_U65_O,                          -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-NMI_N
        RD_N    => PinSignal_U_Z80_RD_N,                     -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-RD_N
        RESET_N => PinSignal_U58_Q,                          -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-RESET_N
        RFSH_N  => PinSignal_U_Z80_RFSH_N,                   -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-RFSH_N
        WAIT_N  => PinSignal_U46_Q,                          -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-WAIT_N
        WR_N    => PinSignal_U_Z80_WR_N                      -- ObjectKind=Sheet Entry|PrimaryId=tv80n.v-WR_N
      );

    Z2 : Configurable_Z2                                     -- ObjectKind=Part|PrimaryId=Z2|SecondaryId=1
      Port Map
      (
        BUS_REQ     => NamedSignal_PIN25,                    -- ObjectKind=Pin|PrimaryId=Z2-BUS_REQ
        BUSACK_Z80  => NamedSignal_PIN23,                    -- ObjectKind=Pin|PrimaryId=Z2-BUSACK_Z80
        HALT_Z80    => NamedSignal_PIN18,                    -- ObjectKind=Pin|PrimaryId=Z2-HALT_Z80
        M1_Z80      => NamedSignal_PIN27,                    -- ObjectKind=Pin|PrimaryId=Z2-M1_Z80
        NMI_Z80     => NamedSignal_PIN17,                    -- ObjectKind=Pin|PrimaryId=Z2-NMI_Z80
        RD_Z80      => NamedSignal_PIN21,                    -- ObjectKind=Pin|PrimaryId=Z2-RD_Z80
        REFRESH_Z80 => NamedSignal_PIN28,                    -- ObjectKind=Pin|PrimaryId=Z2-REFRESH_Z80
        RESET_Z80   => NamedSignal_PIN26,                    -- ObjectKind=Pin|PrimaryId=Z2-RESET_Z80
        TCK         => TCK_SOFT,                             -- ObjectKind=Pin|PrimaryId=Z2-TCK
        TDI         => PinSignal_Z1_TDO,                     -- ObjectKind=Pin|PrimaryId=Z2-TDI
        TDO         => PinSignal_Z2_TDO,                     -- ObjectKind=Pin|PrimaryId=Z2-TDO
        TMS         => TMS_SOFT,                             -- ObjectKind=Pin|PrimaryId=Z2-TMS
        TRST        => NamedSignal_JTAG_NEXUS_TRST,          -- ObjectKind=Pin|PrimaryId=Z2-TRST
        WAIT_Z80    => NamedSignal_PIN24,                    -- ObjectKind=Pin|PrimaryId=Z2-WAIT_Z80
        WR_Z80      => NamedSignal_PIN22                     -- ObjectKind=Pin|PrimaryId=Z2-WR_Z80
      );

    Z1 : Configurable_Z1                                     -- ObjectKind=Part|PrimaryId=Z1|SecondaryId=1
      Port Map
      (
        BUS_7M      => NamedSignal_BUS_7M,                   -- ObjectKind=Pin|PrimaryId=Z1-BUS_7M
        BUS_PHASE0  => NamedSignal_BUS_PHASE0,               -- ObjectKind=Pin|PrimaryId=Z1-BUS_PHASE0
        BUS_PHASE1  => NamedSignal_BUS_PHASE1,               -- ObjectKind=Pin|PrimaryId=Z1-BUS_PHASE1
        CLK         => NamedSignal_CLK50,                    -- ObjectKind=Pin|PrimaryId=Z1-CLK
        CLK_CAP     => PowerSignal_GND,                      -- ObjectKind=Pin|PrimaryId=Z1-CLK_CAP
        DIN0        => NamedSignal_DIN7,                     -- ObjectKind=Pin|PrimaryId=Z1-DIN0
        DIN1        => NamedSignal_DIN6,                     -- ObjectKind=Pin|PrimaryId=Z1-DIN1
        DIN2        => NamedSignal_DIN5,                     -- ObjectKind=Pin|PrimaryId=Z1-DIN2
        DIN3        => NamedSignal_DIN4,                     -- ObjectKind=Pin|PrimaryId=Z1-DIN3
        DIN4        => NamedSignal_DIN3,                     -- ObjectKind=Pin|PrimaryId=Z1-DIN4
        DIN5        => NamedSignal_DIN2,                     -- ObjectKind=Pin|PrimaryId=Z1-DIN5
        DIN6        => NamedSignal_DIN1,                     -- ObjectKind=Pin|PrimaryId=Z1-DIN6
        DIN7        => NamedSignal_DIN0,                     -- ObjectKind=Pin|PrimaryId=Z1-DIN7
        EXT_TRIGGER => PowerSignal_GND,                      -- ObjectKind=Pin|PrimaryId=Z1-EXT_TRIGGER
        RWIN        => NamedSignal_RWIN,                     -- ObjectKind=Pin|PrimaryId=Z1-RWIN
        RWOUT       => NamedSignal_RWOUT,                    -- ObjectKind=Pin|PrimaryId=Z1-RWOUT
        TCK         => TCK_SOFT,                             -- ObjectKind=Pin|PrimaryId=Z1-TCK
        TDI         => PinSignal_U1_TDO,                     -- ObjectKind=Pin|PrimaryId=Z1-TDI
        TDO         => PinSignal_Z1_TDO,                     -- ObjectKind=Pin|PrimaryId=Z1-TDO
        TMS         => TMS_SOFT,                             -- ObjectKind=Pin|PrimaryId=Z1-TMS
        TRST        => NamedSignal_JTAG_NEXUS_TRST,          -- ObjectKind=Pin|PrimaryId=Z1-TRST
        Z80_A0      => NamedSignal_Z80_A0,                   -- ObjectKind=Pin|PrimaryId=Z1-Z80_A0
        Z80_A1      => NamedSignal_Z80_A1,                   -- ObjectKind=Pin|PrimaryId=Z1-Z80_A1
        Z80_A2      => NamedSignal_Z80_A2,                   -- ObjectKind=Pin|PrimaryId=Z1-Z80_A2
        Z80_A3      => NamedSignal_Z80_A3,                   -- ObjectKind=Pin|PrimaryId=Z1-Z80_A3
        Z80_A4      => NamedSignal_Z80_A4,                   -- ObjectKind=Pin|PrimaryId=Z1-Z80_A4
        Z80_A5      => NamedSignal_Z80_A5,                   -- ObjectKind=Pin|PrimaryId=Z1-Z80_A5
        Z80_A6      => NamedSignal_Z80_A6,                   -- ObjectKind=Pin|PrimaryId=Z1-Z80_A6
        Z80_A7      => NamedSignal_Z80_A7,                   -- ObjectKind=Pin|PrimaryId=Z1-Z80_A7
        Z80_A8      => NamedSignal_Z80_A8,                   -- ObjectKind=Pin|PrimaryId=Z1-Z80_A8
        Z80_A9      => NamedSignal_Z80_A9,                   -- ObjectKind=Pin|PrimaryId=Z1-Z80_A9
        Z80_A10     => NamedSignal_Z80_A10,                  -- ObjectKind=Pin|PrimaryId=Z1-Z80_A10
        Z80_A11     => NamedSignal_Z80_A11,                  -- ObjectKind=Pin|PrimaryId=Z1-Z80_A11
        Z80_A12     => NamedSignal_Z80_A12,                  -- ObjectKind=Pin|PrimaryId=Z1-Z80_A12
        Z80_A13     => NamedSignal_Z80_A13,                  -- ObjectKind=Pin|PrimaryId=Z1-Z80_A13
        Z80_A14     => NamedSignal_Z80_A14,                  -- ObjectKind=Pin|PrimaryId=Z1-Z80_A14
        Z80_A15     => NamedSignal_Z80_A15,                  -- ObjectKind=Pin|PrimaryId=Z1-Z80_A15
        Z80CLK      => NamedSignal_Z80CLK                    -- ObjectKind=Pin|PrimaryId=Z1-Z80CLK
      );

    U70 : Configurable_U70                                   -- ObjectKind=Part|PrimaryId=U70|SecondaryId=1
      Port Map
      (
        I => PinSignal_U69_CLKDV,                            -- ObjectKind=Pin|PrimaryId=U70-I
        O => PinSignal_U70_O                                 -- ObjectKind=Pin|PrimaryId=U70-O
      );

    U69 : CDIV2                                              -- ObjectKind=Part|PrimaryId=U69|SecondaryId=1
      Port Map
      (
        CLKDV => PinSignal_U69_CLKDV,                        -- ObjectKind=Pin|PrimaryId=U69-CLKDV
        CLKIN => PinSignal_CLK1_CLKA                         -- ObjectKind=Pin|PrimaryId=U69-CLKIN
      );

    U68 : Configurable_U68                                   -- ObjectKind=Part|PrimaryId=U68|SecondaryId=1
      Port Map
      (
        I => NamedSignal_SYSCLK,                             -- ObjectKind=Pin|PrimaryId=U68-I
        O => PinSignal_U68_O                                 -- ObjectKind=Pin|PrimaryId=U68-O
      );

    U67 : Configurable_U67                                   -- ObjectKind=Part|PrimaryId=U67|SecondaryId=1
      Port Map
      (
        I => BUS_PHASE0,                                     -- ObjectKind=Pin|PrimaryId=U67-I
        O => PinSignal_U67_O                                 -- ObjectKind=Pin|PrimaryId=U67-O
      );

    U66 : Configurable_U66                                   -- ObjectKind=Part|PrimaryId=U66|SecondaryId=1
      Port Map
      (
        I => PinSignal_U45_Q,                                -- ObjectKind=Pin|PrimaryId=U66-I
        O => PinSignal_U66_O                                 -- ObjectKind=Pin|PrimaryId=U66-O
      );

    U65 : M1_S2S1                                            -- ObjectKind=Part|PrimaryId=U65|SecondaryId=1
      Port Map
      (
        D0 => PowerSignal_VCC,                               -- ObjectKind=Pin|PrimaryId=U65-D0
        D1 => BUS_NMI,                                       -- ObjectKind=Pin|PrimaryId=U65-D1
        O  => PinSignal_U65_O,                               -- ObjectKind=Pin|PrimaryId=U65-O
        S0 => PowerSignal_GND                                -- ObjectKind=Pin|PrimaryId=U65-S0
      );

    U64 : M1_S2S1                                            -- ObjectKind=Part|PrimaryId=U64|SecondaryId=1
      Port Map
      (
        D0 => PinSignal_U57_O,                               -- ObjectKind=Pin|PrimaryId=U64-D0
        D1 => PowerSignal_VCC,                               -- ObjectKind=Pin|PrimaryId=U64-D1
        O  => PinSignal_U64_O,                               -- ObjectKind=Pin|PrimaryId=U64-O
        S0 => PinSignal_U45_QN                               -- ObjectKind=Pin|PrimaryId=U64-S0
      );

    U63 : Configurable_U63                                   -- ObjectKind=Part|PrimaryId=U63|SecondaryId=1
      Port Map
      (
        I0 => PinSignal_U64_O,                               -- ObjectKind=Pin|PrimaryId=U63-I0
        I1 => PinSignal_U59_O,                               -- ObjectKind=Pin|PrimaryId=U63-I1
        O  => PinSignal_U63_O                                -- ObjectKind=Pin|PrimaryId=U63-O
      );

    U62 : IOBUF                                              -- ObjectKind=Part|PrimaryId=U62|SecondaryId=1
      Port Map
      (
        I  => PowerSignal_GND,                               -- ObjectKind=Pin|PrimaryId=U62-I
        IO => BUS_RDY,                                       -- ObjectKind=Pin|PrimaryId=U62-IO
        T  => PinSignal_U66_O                                -- ObjectKind=Pin|PrimaryId=U62-T
      );

    U61 : M1_S2S1                                            -- ObjectKind=Part|PrimaryId=U61|SecondaryId=1
      Port Map
      (
        D0 => PowerSignal_VCC,                               -- ObjectKind=Pin|PrimaryId=U61-D0
        D1 => BUS_IRQ,                                       -- ObjectKind=Pin|PrimaryId=U61-D1
        O  => PinSignal_U61_O,                               -- ObjectKind=Pin|PrimaryId=U61-O
        S0 => PowerSignal_GND                                -- ObjectKind=Pin|PrimaryId=U61-S0
      );

    U60 : Configurable_U60                                   -- ObjectKind=Part|PrimaryId=U60|SecondaryId=1
      Port Map
      (
        I0 => PinSignal_U59_O,                               -- ObjectKind=Pin|PrimaryId=U60-I0
        I1 => PinSignal_U59_O,                               -- ObjectKind=Pin|PrimaryId=U60-I1
        O  => PinSignal_U60_O                                -- ObjectKind=Pin|PrimaryId=U60-O
      );

    U59 : Configurable_U59                                   -- ObjectKind=Part|PrimaryId=U59|SecondaryId=1
      Port Map
      (
        I0 => PinSignal_U55_O,                               -- ObjectKind=Pin|PrimaryId=U59-I0
        I1 => PinSignal_U45_QN,                              -- ObjectKind=Pin|PrimaryId=U59-I1
        O  => PinSignal_U59_O                                -- ObjectKind=Pin|PrimaryId=U59-O
      );

    U58 : Configurable_U58                                   -- ObjectKind=Part|PrimaryId=U58|SecondaryId=1
      Port Map
      (
        C => PinSignal_U2_O,                                 -- ObjectKind=Pin|PrimaryId=U58-C
        D => BUS_RESET,                                      -- ObjectKind=Pin|PrimaryId=U58-D
        Q => PinSignal_U58_Q                                 -- ObjectKind=Pin|PrimaryId=U58-Q
      );

    U57 : IOBUF                                              -- ObjectKind=Part|PrimaryId=U57|SecondaryId=1
      Port Map
      (
        I  => PowerSignal_GND,                               -- ObjectKind=Pin|PrimaryId=U57-I
        IO => BUS_DMA,                                       -- ObjectKind=Pin|PrimaryId=U57-IO
        O  => PinSignal_U57_O,                               -- ObjectKind=Pin|PrimaryId=U57-O
        T  => PinSignal_U56_O                                -- ObjectKind=Pin|PrimaryId=U57-T
      );

    U56 : Configurable_U56                                   -- ObjectKind=Part|PrimaryId=U56|SecondaryId=1
      Port Map
      (
        I => PinSignal_U60_O,                                -- ObjectKind=Pin|PrimaryId=U56-I
        O => PinSignal_U56_O                                 -- ObjectKind=Pin|PrimaryId=U56-O
      );

    U55 : Configurable_U55                                   -- ObjectKind=Part|PrimaryId=U55|SecondaryId=1
      Port Map
      (
        I0 => PinSignal_U_Z80_RFSH_N,                        -- ObjectKind=Pin|PrimaryId=U55-I0
        I1 => PinSignal_U_Z80_BUSAK_N,                       -- ObjectKind=Pin|PrimaryId=U55-I1
        O  => PinSignal_U55_O                                -- ObjectKind=Pin|PrimaryId=U55-O
      );

    U54 : IOBUF                                              -- ObjectKind=Part|PrimaryId=U54|SecondaryId=1
      Port Map
      (
        I  => PowerSignal_GND,                               -- ObjectKind=Pin|PrimaryId=U54-I
        IO => BUS_DMAOUT,                                    -- ObjectKind=Pin|PrimaryId=U54-IO
        O  => PinSignal_U54_O,                               -- ObjectKind=Pin|PrimaryId=U54-O
        T  => PinSignal_U50_O                                -- ObjectKind=Pin|PrimaryId=U54-T
      );

    U53 : Configurable_U53                                   -- ObjectKind=Part|PrimaryId=U53|SecondaryId=1
      Port Map
      (
        I => PinSignal_U58_Q,                                -- ObjectKind=Pin|PrimaryId=U53-I
        O => PinSignal_U53_O                                 -- ObjectKind=Pin|PrimaryId=U53-O
      );

    U52 : Configurable_U52                                   -- ObjectKind=Part|PrimaryId=U52|SecondaryId=1
      Port Map
      (
        I => PinSignal_U45_Q,                                -- ObjectKind=Pin|PrimaryId=U52-I
        O => PinSignal_U52_O                                 -- ObjectKind=Pin|PrimaryId=U52-O
      );

    U51 : Configurable_U51                                   -- ObjectKind=Part|PrimaryId=U51|SecondaryId=1
      Port Map
      (
        I0 => BUS_DMAIN,                                     -- ObjectKind=Pin|PrimaryId=U51-I0
        I1 => PinSignal_U66_O,                               -- ObjectKind=Pin|PrimaryId=U51-I1
        O  => PinSignal_U51_O                                -- ObjectKind=Pin|PrimaryId=U51-O
      );

    U50 : Configurable_U50                                   -- ObjectKind=Part|PrimaryId=U50|SecondaryId=1
      Port Map
      (
        I => PinSignal_U51_O,                                -- ObjectKind=Pin|PrimaryId=U50-I
        O => PinSignal_U50_O                                 -- ObjectKind=Pin|PrimaryId=U50-O
      );

    U49 : Configurable_U49                                   -- ObjectKind=Part|PrimaryId=U49|SecondaryId=1
      Port Map
      (
        C => NamedSignal_CLK50,                              -- ObjectKind=Pin|PrimaryId=U49-C
        D => N_BUS_IO_SEL,                                   -- ObjectKind=Pin|PrimaryId=U49-D
        Q => PinSignal_U49_Q                                 -- ObjectKind=Pin|PrimaryId=U49-Q
      );

    U48 : Configurable_U48                                   -- ObjectKind=Part|PrimaryId=U48|SecondaryId=1
      Port Map
      (
        C => NamedSignal_CLK50,                              -- ObjectKind=Pin|PrimaryId=U48-C
        D => PinSignal_U47_O,                                -- ObjectKind=Pin|PrimaryId=U48-D
        Q => PinSignal_U48_Q                                 -- ObjectKind=Pin|PrimaryId=U48-Q
      );

    U47 : Configurable_U47                                   -- ObjectKind=Part|PrimaryId=U47|SecondaryId=1
      Port Map
      (
        I0 => NamedSignal_RWIN,                              -- ObjectKind=Pin|PrimaryId=U47-I0
        I1 => PinSignal_U49_Q,                               -- ObjectKind=Pin|PrimaryId=U47-I1
        O  => PinSignal_U47_O                                -- ObjectKind=Pin|PrimaryId=U47-O
      );

    U46 : Configurable_U46                                   -- ObjectKind=Part|PrimaryId=U46|SecondaryId=1
      Port Map
      (
        C   => PinSignal_U8_O,                               -- ObjectKind=Pin|PrimaryId=U46-C
        CLR => PinSignal_U52_O,                              -- ObjectKind=Pin|PrimaryId=U46-CLR
        D   => PinSignal_U45_Q,                              -- ObjectKind=Pin|PrimaryId=U46-D
        Q   => PinSignal_U46_Q                               -- ObjectKind=Pin|PrimaryId=U46-Q
      );

    U45 : Configurable_U45                                   -- ObjectKind=Part|PrimaryId=U45|SecondaryId=1
      Port Map
      (
        C   => PinSignal_U48_Q,                              -- ObjectKind=Pin|PrimaryId=U45-C
        CLR => PinSignal_U53_O,                              -- ObjectKind=Pin|PrimaryId=U45-CLR
        D   => PinSignal_U45_QN,                             -- ObjectKind=Pin|PrimaryId=U45-D
        Q   => PinSignal_U45_Q,                              -- ObjectKind=Pin|PrimaryId=U45-Q
        QN  => PinSignal_U45_QN                              -- ObjectKind=Pin|PrimaryId=U45-QN
      );

    U44 : M8_B2B1                                            -- ObjectKind=Part|PrimaryId=U44|SecondaryId=1
      Port Map
      (
        A  => PinSignal_U43_O,                               -- ObjectKind=Pin|PrimaryId=U44-A[7..0]
        B  => NamedSignal_VCC1_BUS,                          -- ObjectKind=Pin|PrimaryId=U44-B[7..0]
        S0 => PinSignal_U_Z80_RD_N,                          -- ObjectKind=Pin|PrimaryId=U44-S0
        Y  => PinSignal_U44_Y                                -- ObjectKind=Pin|PrimaryId=U44-Y[7..0]
      );

    U43 : Configurable_U43                                   -- ObjectKind=Part|PrimaryId=U43|SecondaryId=1
      Port Map
      (
        I0 => PinSignal_U42_Q0,                              -- ObjectKind=Pin|PrimaryId=U43-I0
        I1 => PinSignal_U42_Q1,                              -- ObjectKind=Pin|PrimaryId=U43-I1
        I2 => PinSignal_U42_Q2,                              -- ObjectKind=Pin|PrimaryId=U43-I2
        I3 => PinSignal_U42_Q3,                              -- ObjectKind=Pin|PrimaryId=U43-I3
        I4 => PinSignal_U42_Q4,                              -- ObjectKind=Pin|PrimaryId=U43-I4
        I5 => PinSignal_U42_Q5,                              -- ObjectKind=Pin|PrimaryId=U43-I5
        I6 => PinSignal_U42_Q6,                              -- ObjectKind=Pin|PrimaryId=U43-I6
        I7 => PinSignal_U42_Q7,                              -- ObjectKind=Pin|PrimaryId=U43-I7
        O  => PinSignal_U43_O                                -- ObjectKind=Pin|PrimaryId=U43-O[7..0]
      );

    U42 : Configurable_U42                                   -- ObjectKind=Part|PrimaryId=U42|SecondaryId=1
      Port Map
      (
        D0 => PinSignal_U41_O,                               -- ObjectKind=Pin|PrimaryId=U42-D0
        D1 => PinSignal_U39_O,                               -- ObjectKind=Pin|PrimaryId=U42-D1
        D2 => PinSignal_U37_O,                               -- ObjectKind=Pin|PrimaryId=U42-D2
        D3 => PinSignal_U35_O,                               -- ObjectKind=Pin|PrimaryId=U42-D3
        D4 => PinSignal_U32_O,                               -- ObjectKind=Pin|PrimaryId=U42-D4
        D5 => PinSignal_U27_O,                               -- ObjectKind=Pin|PrimaryId=U42-D5
        D6 => PinSignal_U24_O,                               -- ObjectKind=Pin|PrimaryId=U42-D6
        D7 => PinSignal_U21_O,                               -- ObjectKind=Pin|PrimaryId=U42-D7
        G  => PinSignal_U67_O,                               -- ObjectKind=Pin|PrimaryId=U42-G
        Q0 => PinSignal_U42_Q0,                              -- ObjectKind=Pin|PrimaryId=U42-Q0
        Q1 => PinSignal_U42_Q1,                              -- ObjectKind=Pin|PrimaryId=U42-Q1
        Q2 => PinSignal_U42_Q2,                              -- ObjectKind=Pin|PrimaryId=U42-Q2
        Q3 => PinSignal_U42_Q3,                              -- ObjectKind=Pin|PrimaryId=U42-Q3
        Q4 => PinSignal_U42_Q4,                              -- ObjectKind=Pin|PrimaryId=U42-Q4
        Q5 => PinSignal_U42_Q5,                              -- ObjectKind=Pin|PrimaryId=U42-Q5
        Q6 => PinSignal_U42_Q6,                              -- ObjectKind=Pin|PrimaryId=U42-Q6
        Q7 => PinSignal_U42_Q7                               -- ObjectKind=Pin|PrimaryId=U42-Q7
      );

    U41 : IOBUF                                              -- ObjectKind=Part|PrimaryId=U41|SecondaryId=1
      Port Map
      (
        I  => PinSignal_U34_O0,                              -- ObjectKind=Pin|PrimaryId=U41-I
        IO => BUS_D0,                                        -- ObjectKind=Pin|PrimaryId=U41-IO
        O  => PinSignal_U41_O,                               -- ObjectKind=Pin|PrimaryId=U41-O
        T  => PinSignal_U17_O                                -- ObjectKind=Pin|PrimaryId=U41-T
      );

    U40 : BUFT4S                                             -- ObjectKind=Part|PrimaryId=U40|SecondaryId=1
      Port Map
      (
        I0 => PinSignal_U31_O0,                              -- ObjectKind=Pin|PrimaryId=U40-I0
        I1 => PinSignal_U31_O1,                              -- ObjectKind=Pin|PrimaryId=U40-I1
        I2 => PinSignal_U31_O2,                              -- ObjectKind=Pin|PrimaryId=U40-I2
        I3 => PinSignal_U31_O3,                              -- ObjectKind=Pin|PrimaryId=U40-I3
        O0 => PinSignal_U40_O0,                              -- ObjectKind=Pin|PrimaryId=U40-O0
        O1 => PinSignal_U40_O1,                              -- ObjectKind=Pin|PrimaryId=U40-O1
        O2 => PinSignal_U40_O2,                              -- ObjectKind=Pin|PrimaryId=U40-O2
        O3 => PinSignal_U40_O3,                              -- ObjectKind=Pin|PrimaryId=U40-O3
        T  => PinSignal_U63_O                                -- ObjectKind=Pin|PrimaryId=U40-T
      );

    U39 : IOBUF                                              -- ObjectKind=Part|PrimaryId=U39|SecondaryId=1
      Port Map
      (
        I  => PinSignal_U34_O1,                              -- ObjectKind=Pin|PrimaryId=U39-I
        IO => BUS_D1,                                        -- ObjectKind=Pin|PrimaryId=U39-IO
        O  => PinSignal_U39_O,                               -- ObjectKind=Pin|PrimaryId=U39-O
        T  => PinSignal_U17_O                                -- ObjectKind=Pin|PrimaryId=U39-T
      );

    U38 : M1_S2S1                                            -- ObjectKind=Part|PrimaryId=U38|SecondaryId=1
      Port Map
      (
        D0 => PowerSignal_VCC,                               -- ObjectKind=Pin|PrimaryId=U38-D0
        D1 => BUS_DMAIN,                                     -- ObjectKind=Pin|PrimaryId=U38-D1
        O  => PinSignal_U38_O,                               -- ObjectKind=Pin|PrimaryId=U38-O
        S0 => PowerSignal_GND                                -- ObjectKind=Pin|PrimaryId=U38-S0
      );

    U37 : IOBUF                                              -- ObjectKind=Part|PrimaryId=U37|SecondaryId=1
      Port Map
      (
        I  => PinSignal_U34_O2,                              -- ObjectKind=Pin|PrimaryId=U37-I
        IO => BUS_D2,                                        -- ObjectKind=Pin|PrimaryId=U37-IO
        O  => PinSignal_U37_O,                               -- ObjectKind=Pin|PrimaryId=U37-O
        T  => PinSignal_U17_O                                -- ObjectKind=Pin|PrimaryId=U37-T
      );

    U36 : BUFT6S                                             -- ObjectKind=Part|PrimaryId=U36|SecondaryId=1
      Port Map
      (
        I0 => PinSignal_U31_O4,                              -- ObjectKind=Pin|PrimaryId=U36-I0
        I1 => PinSignal_U31_O5,                              -- ObjectKind=Pin|PrimaryId=U36-I1
        I2 => PinSignal_U31_O6,                              -- ObjectKind=Pin|PrimaryId=U36-I2
        I3 => PinSignal_U31_O7,                              -- ObjectKind=Pin|PrimaryId=U36-I3
        I4 => PinSignal_U31_O8,                              -- ObjectKind=Pin|PrimaryId=U36-I4
        I5 => PinSignal_U31_O9,                              -- ObjectKind=Pin|PrimaryId=U36-I5
        O0 => PinSignal_U36_O0,                              -- ObjectKind=Pin|PrimaryId=U36-O0
        O1 => PinSignal_U36_O1,                              -- ObjectKind=Pin|PrimaryId=U36-O1
        O2 => PinSignal_U36_O2,                              -- ObjectKind=Pin|PrimaryId=U36-O2
        O3 => PinSignal_U36_O3,                              -- ObjectKind=Pin|PrimaryId=U36-O3
        O4 => PinSignal_U36_O4,                              -- ObjectKind=Pin|PrimaryId=U36-O4
        O5 => PinSignal_U36_O5,                              -- ObjectKind=Pin|PrimaryId=U36-O5
        T  => PinSignal_U63_O                                -- ObjectKind=Pin|PrimaryId=U36-T
      );

    U35 : IOBUF                                              -- ObjectKind=Part|PrimaryId=U35|SecondaryId=1
      Port Map
      (
        I  => PinSignal_U34_O3,                              -- ObjectKind=Pin|PrimaryId=U35-I
        IO => BUS_D3,                                        -- ObjectKind=Pin|PrimaryId=U35-IO
        O  => PinSignal_U35_O,                               -- ObjectKind=Pin|PrimaryId=U35-O
        T  => PinSignal_U17_O                                -- ObjectKind=Pin|PrimaryId=U35-T
      );

    U34 : Configurable_U34                                   -- ObjectKind=Part|PrimaryId=U34|SecondaryId=1
      Port Map
      (
        I  => PinSignal_U_Z80_DO,                            -- ObjectKind=Pin|PrimaryId=U34-I[7..0]
        O0 => PinSignal_U34_O0,                              -- ObjectKind=Pin|PrimaryId=U34-O0
        O1 => PinSignal_U34_O1,                              -- ObjectKind=Pin|PrimaryId=U34-O1
        O2 => PinSignal_U34_O2,                              -- ObjectKind=Pin|PrimaryId=U34-O2
        O3 => PinSignal_U34_O3,                              -- ObjectKind=Pin|PrimaryId=U34-O3
        O4 => PinSignal_U34_O4,                              -- ObjectKind=Pin|PrimaryId=U34-O4
        O5 => PinSignal_U34_O5,                              -- ObjectKind=Pin|PrimaryId=U34-O5
        O6 => PinSignal_U34_O6,                              -- ObjectKind=Pin|PrimaryId=U34-O6
        O7 => PinSignal_U34_O7                               -- ObjectKind=Pin|PrimaryId=U34-O7
      );

    U33 : Configurable_U33                                   -- ObjectKind=Part|PrimaryId=U33|SecondaryId=1
      Port Map
      (
        I0 => PinSignal_U20_O,                               -- ObjectKind=Pin|PrimaryId=U33-I0
        I1 => PowerSignal_GND,                               -- ObjectKind=Pin|PrimaryId=U33-I1
        I2 => PowerSignal_GND,                               -- ObjectKind=Pin|PrimaryId=U33-I2
        I3 => PowerSignal_GND,                               -- ObjectKind=Pin|PrimaryId=U33-I3
        O  => PinSignal_U33_O                                -- ObjectKind=Pin|PrimaryId=U33-O[3..0]
      );

    U32 : IOBUF                                              -- ObjectKind=Part|PrimaryId=U32|SecondaryId=1
      Port Map
      (
        I  => PinSignal_U34_O4,                              -- ObjectKind=Pin|PrimaryId=U32-I
        IO => BUS_D4,                                        -- ObjectKind=Pin|PrimaryId=U32-IO
        O  => PinSignal_U32_O,                               -- ObjectKind=Pin|PrimaryId=U32-O
        T  => PinSignal_U17_O                                -- ObjectKind=Pin|PrimaryId=U32-T
      );

    U31 : Configurable_U31                                   -- ObjectKind=Part|PrimaryId=U31|SecondaryId=1
      Port Map
      (
        I   => PinSignal_U_Z80_A,                            -- ObjectKind=Pin|PrimaryId=U31-I[15..0]
        O0  => PinSignal_U31_O0,                             -- ObjectKind=Pin|PrimaryId=U31-O0
        O1  => PinSignal_U31_O1,                             -- ObjectKind=Pin|PrimaryId=U31-O1
        O2  => PinSignal_U31_O2,                             -- ObjectKind=Pin|PrimaryId=U31-O2
        O3  => PinSignal_U31_O3,                             -- ObjectKind=Pin|PrimaryId=U31-O3
        O4  => PinSignal_U31_O4,                             -- ObjectKind=Pin|PrimaryId=U31-O4
        O5  => PinSignal_U31_O5,                             -- ObjectKind=Pin|PrimaryId=U31-O5
        O6  => PinSignal_U31_O6,                             -- ObjectKind=Pin|PrimaryId=U31-O6
        O7  => PinSignal_U31_O7,                             -- ObjectKind=Pin|PrimaryId=U31-O7
        O8  => PinSignal_U31_O8,                             -- ObjectKind=Pin|PrimaryId=U31-O8
        O9  => PinSignal_U31_O9,                             -- ObjectKind=Pin|PrimaryId=U31-O9
        O10 => PinSignal_U31_O10,                            -- ObjectKind=Pin|PrimaryId=U31-O10
        O11 => PinSignal_U31_O11,                            -- ObjectKind=Pin|PrimaryId=U31-O11
        O12 => PinSignal_U31_O12,                            -- ObjectKind=Pin|PrimaryId=U31-O12
        O13 => PinSignal_U31_O13,                            -- ObjectKind=Pin|PrimaryId=U31-O13
        O14 => PinSignal_U31_O14,                            -- ObjectKind=Pin|PrimaryId=U31-O14
        O15 => PinSignal_U31_O15                             -- ObjectKind=Pin|PrimaryId=U31-O15
      );

    U30 : Configurable_U30                                   -- ObjectKind=Part|PrimaryId=U30|SecondaryId=1
      Port Map
      (
        A  => PinSignal_U23_O,                               -- ObjectKind=Pin|PrimaryId=U30-A[3..0]
        B  => PinSignal_U33_O,                               -- ObjectKind=Pin|PrimaryId=U30-B[3..0]
        CI => PinSignal_U19_O,                               -- ObjectKind=Pin|PrimaryId=U30-CI
        S  => PinSignal_U30_S                                -- ObjectKind=Pin|PrimaryId=U30-S[3..0]
      );

    U29 : Configurable_U29                                   -- ObjectKind=Part|PrimaryId=U29|SecondaryId=1
      Port Map
      (
        I0 => PinSignal_U22_O,                               -- ObjectKind=Pin|PrimaryId=U29-I0
        I1 => PinSignal_U31_O12,                             -- ObjectKind=Pin|PrimaryId=U29-I1
        O  => PinSignal_U29_O                                -- ObjectKind=Pin|PrimaryId=U29-O
      );

    U28 : J4B_4S                                             -- ObjectKind=Part|PrimaryId=U28|SecondaryId=1
      Port Map
      (
        I  => PinSignal_U30_S,                               -- ObjectKind=Pin|PrimaryId=U28-I[3..0]
        O0 => PinSignal_U28_O0,                              -- ObjectKind=Pin|PrimaryId=U28-O0
        O1 => PinSignal_U28_O1,                              -- ObjectKind=Pin|PrimaryId=U28-O1
        O2 => PinSignal_U28_O2,                              -- ObjectKind=Pin|PrimaryId=U28-O2
        O3 => PinSignal_U28_O3                               -- ObjectKind=Pin|PrimaryId=U28-O3
      );

    U27 : IOBUF                                              -- ObjectKind=Part|PrimaryId=U27|SecondaryId=1
      Port Map
      (
        I  => PinSignal_U34_O5,                              -- ObjectKind=Pin|PrimaryId=U27-I
        IO => BUS_D5,                                        -- ObjectKind=Pin|PrimaryId=U27-IO
        O  => PinSignal_U27_O,                               -- ObjectKind=Pin|PrimaryId=U27-O
        T  => PinSignal_U17_O                                -- ObjectKind=Pin|PrimaryId=U27-T
      );

    U26 : BUFT6S                                             -- ObjectKind=Part|PrimaryId=U26|SecondaryId=1
      Port Map
      (
        I0 => PinSignal_U31_O10,                             -- ObjectKind=Pin|PrimaryId=U26-I0
        I1 => PinSignal_U31_O11,                             -- ObjectKind=Pin|PrimaryId=U26-I1
        I2 => PinSignal_U28_O0,                              -- ObjectKind=Pin|PrimaryId=U26-I2
        I3 => PinSignal_U28_O1,                              -- ObjectKind=Pin|PrimaryId=U26-I3
        I4 => PinSignal_U28_O2,                              -- ObjectKind=Pin|PrimaryId=U26-I4
        I5 => PinSignal_U28_O3,                              -- ObjectKind=Pin|PrimaryId=U26-I5
        O0 => PinSignal_U26_O0,                              -- ObjectKind=Pin|PrimaryId=U26-O0
        O1 => PinSignal_U26_O1,                              -- ObjectKind=Pin|PrimaryId=U26-O1
        O2 => PinSignal_U26_O2,                              -- ObjectKind=Pin|PrimaryId=U26-O2
        O3 => PinSignal_U26_O3,                              -- ObjectKind=Pin|PrimaryId=U26-O3
        O4 => PinSignal_U26_O4,                              -- ObjectKind=Pin|PrimaryId=U26-O4
        O5 => PinSignal_U26_O5,                              -- ObjectKind=Pin|PrimaryId=U26-O5
        T  => PinSignal_U63_O                                -- ObjectKind=Pin|PrimaryId=U26-T
      );

    U25 : Configurable_U25                                   -- ObjectKind=Part|PrimaryId=U25|SecondaryId=1
      Port Map
      (
        I0 => PinSignal_U22_O,                               -- ObjectKind=Pin|PrimaryId=U25-I0
        I1 => PinSignal_U31_O14,                             -- ObjectKind=Pin|PrimaryId=U25-I1
        O  => PinSignal_U25_O                                -- ObjectKind=Pin|PrimaryId=U25-O
      );

    U24 : IOBUF                                              -- ObjectKind=Part|PrimaryId=U24|SecondaryId=1
      Port Map
      (
        I  => PinSignal_U34_O6,                              -- ObjectKind=Pin|PrimaryId=U24-I
        IO => BUS_D6,                                        -- ObjectKind=Pin|PrimaryId=U24-IO
        O  => PinSignal_U24_O,                               -- ObjectKind=Pin|PrimaryId=U24-O
        T  => PinSignal_U17_O                                -- ObjectKind=Pin|PrimaryId=U24-T
      );

    U23 : Configurable_U23                                   -- ObjectKind=Part|PrimaryId=U23|SecondaryId=1
      Port Map
      (
        I0 => PinSignal_U29_O,                               -- ObjectKind=Pin|PrimaryId=U23-I0
        I1 => PinSignal_U31_O13,                             -- ObjectKind=Pin|PrimaryId=U23-I1
        I2 => PinSignal_U25_O,                               -- ObjectKind=Pin|PrimaryId=U23-I2
        I3 => PinSignal_U31_O15,                             -- ObjectKind=Pin|PrimaryId=U23-I3
        O  => PinSignal_U23_O                                -- ObjectKind=Pin|PrimaryId=U23-O[3..0]
      );

    U22 : Configurable_U22                                   -- ObjectKind=Part|PrimaryId=U22|SecondaryId=1
      Port Map
      (
        I0 => PowerSignal_VCC,                               -- ObjectKind=Pin|PrimaryId=U22-I0
        I1 => PinSignal_U13_O6,                              -- ObjectKind=Pin|PrimaryId=U22-I1
        O  => PinSignal_U22_O                                -- ObjectKind=Pin|PrimaryId=U22-O
      );

    U21 : IOBUF                                              -- ObjectKind=Part|PrimaryId=U21|SecondaryId=1
      Port Map
      (
        I  => PinSignal_U34_O7,                              -- ObjectKind=Pin|PrimaryId=U21-I
        IO => BUS_D7,                                        -- ObjectKind=Pin|PrimaryId=U21-IO
        O  => PinSignal_U21_O,                               -- ObjectKind=Pin|PrimaryId=U21-O
        T  => PinSignal_U17_O                                -- ObjectKind=Pin|PrimaryId=U21-T
      );

    U20 : Configurable_U20                                   -- ObjectKind=Part|PrimaryId=U20|SecondaryId=1
      Port Map
      (
        I0 => PinSignal_U13_O5,                              -- ObjectKind=Pin|PrimaryId=U20-I0
        I1 => PinSignal_U13_O4,                              -- ObjectKind=Pin|PrimaryId=U20-I1
        I2 => PinSignal_U13_O4,                              -- ObjectKind=Pin|PrimaryId=U20-I2
        I3 => PinSignal_U13_O3,                              -- ObjectKind=Pin|PrimaryId=U20-I3
        O  => PinSignal_U20_O                                -- ObjectKind=Pin|PrimaryId=U20-O
      );

    U19 : M1_S2S1                                            -- ObjectKind=Part|PrimaryId=U19|SecondaryId=1
      Port Map
      (
        D0 => PowerSignal_GND,                               -- ObjectKind=Pin|PrimaryId=U19-D0
        D1 => PowerSignal_VCC,                               -- ObjectKind=Pin|PrimaryId=U19-D1
        O  => PinSignal_U19_O,                               -- ObjectKind=Pin|PrimaryId=U19-O
        S0 => PowerSignal_VCC                                -- ObjectKind=Pin|PrimaryId=U19-S0
      );

    U18 : Configurable_U18                                   -- ObjectKind=Part|PrimaryId=U18|SecondaryId=1
      Port Map
      (
        I => PinSignal_U16_D,                                -- ObjectKind=Pin|PrimaryId=U18-I[7..0]
        O => PinSignal_U18_O                                 -- ObjectKind=Pin|PrimaryId=U18-O[7..0]
      );

    U17 : Configurable_U17                                   -- ObjectKind=Part|PrimaryId=U17|SecondaryId=1
      Port Map
      (
        I0 => PinSignal_U7_Q,                                -- ObjectKind=Pin|PrimaryId=U17-I0
        I1 => PinSignal_U63_O,                               -- ObjectKind=Pin|PrimaryId=U17-I1
        O  => PinSignal_U17_O                                -- ObjectKind=Pin|PrimaryId=U17-O
      );

    U16 : M1_S1B8E                                           -- ObjectKind=Part|PrimaryId=U16|SecondaryId=1
      Port Map
      (
        D  => PinSignal_U16_D,                               -- ObjectKind=Pin|PrimaryId=U16-D[7..0]
        E  => PinSignal_U11_O,                               -- ObjectKind=Pin|PrimaryId=U16-E
        O  => PowerSignal_VCC,                               -- ObjectKind=Pin|PrimaryId=U16-O
        S0 => PinSignal_U31_O12,                             -- ObjectKind=Pin|PrimaryId=U16-S0
        S1 => PinSignal_U31_O13,                             -- ObjectKind=Pin|PrimaryId=U16-S1
        S2 => PinSignal_U31_O14                              -- ObjectKind=Pin|PrimaryId=U16-S2
      );

    U15 : Configurable_U15                                   -- ObjectKind=Part|PrimaryId=U15|SecondaryId=1
      Port Map
      (
        I => PinSignal_U_Z80_WR_N,                           -- ObjectKind=Pin|PrimaryId=U15-I
        O => PinSignal_U15_O                                 -- ObjectKind=Pin|PrimaryId=U15-O
      );

    U14 : Configurable_U14                                   -- ObjectKind=Part|PrimaryId=U14|SecondaryId=1
      Port Map
      (
        I => BUS_7M,                                         -- ObjectKind=Pin|PrimaryId=U14-I
        O => PinSignal_U14_O                                 -- ObjectKind=Pin|PrimaryId=U14-O
      );

    U13 : J8B_8S                                             -- ObjectKind=Part|PrimaryId=U13|SecondaryId=1
      Port Map
      (
        I  => PinSignal_U18_O,                               -- ObjectKind=Pin|PrimaryId=U13-I[7..0]
        O3 => PinSignal_U13_O3,                              -- ObjectKind=Pin|PrimaryId=U13-O3
        O4 => PinSignal_U13_O4,                              -- ObjectKind=Pin|PrimaryId=U13-O4
        O5 => PinSignal_U13_O5,                              -- ObjectKind=Pin|PrimaryId=U13-O5
        O6 => PinSignal_U13_O6                               -- ObjectKind=Pin|PrimaryId=U13-O6
      );

    U12 : Configurable_U12                                   -- ObjectKind=Part|PrimaryId=U12|SecondaryId=1
      Port Map
      (
        I0 => PinSignal_U2_O,                                -- ObjectKind=Pin|PrimaryId=U12-I0
        I1 => PinSignal_U14_O,                               -- ObjectKind=Pin|PrimaryId=U12-I1
        O  => PinSignal_U12_O                                -- ObjectKind=Pin|PrimaryId=U12-O
      );

    U11 : Configurable_U11                                   -- ObjectKind=Part|PrimaryId=U11|SecondaryId=1
      Port Map
      (
        I0 => PinSignal_U10_O,                               -- ObjectKind=Pin|PrimaryId=U11-I0
        I1 => PinSignal_U31_O15,                             -- ObjectKind=Pin|PrimaryId=U11-I1
        O  => PinSignal_U11_O                                -- ObjectKind=Pin|PrimaryId=U11-O
      );

    U10 : Configurable_U10                                   -- ObjectKind=Part|PrimaryId=U10|SecondaryId=1
      Port Map
      (
        I => PinSignal_U9_O,                                 -- ObjectKind=Pin|PrimaryId=U10-I
        O => PinSignal_U10_O                                 -- ObjectKind=Pin|PrimaryId=U10-O
      );

    U9 : Configurable_U9                                     -- ObjectKind=Part|PrimaryId=U9|SecondaryId=1
      Port Map
      (
        I0 => PowerSignal_VCC,                               -- ObjectKind=Pin|PrimaryId=U9-I0
        I1 => PinSignal_U19_O,                               -- ObjectKind=Pin|PrimaryId=U9-I1
        O  => PinSignal_U9_O                                 -- ObjectKind=Pin|PrimaryId=U9-O
      );

    U8 : Configurable_U8                                     -- ObjectKind=Part|PrimaryId=U8|SecondaryId=1
      Port Map
      (
        I0 => PinSignal_U2_O,                                -- ObjectKind=Pin|PrimaryId=U8-I0
        I1 => PinSignal_U2_O,                                -- ObjectKind=Pin|PrimaryId=U8-I1
        O  => PinSignal_U8_O                                 -- ObjectKind=Pin|PrimaryId=U8-O
      );

    U7 : Configurable_U7                                     -- ObjectKind=Part|PrimaryId=U7|SecondaryId=1
      Port Map
      (
        C   => PinSignal_U3_O,                               -- ObjectKind=Pin|PrimaryId=U7-C
        CLR => PinSignal_U15_O,                              -- ObjectKind=Pin|PrimaryId=U7-CLR
        D   => NamedSignal_JTAG_NEXUS_TRST,                  -- ObjectKind=Pin|PrimaryId=U7-D
        Q   => PinSignal_U7_Q                                -- ObjectKind=Pin|PrimaryId=U7-Q
      );

    U6 : IOBUF                                               -- ObjectKind=Part|PrimaryId=U6|SecondaryId=1
      Port Map
      (
        I  => PinSignal_U7_Q,                                -- ObjectKind=Pin|PrimaryId=U6-I
        IO => BUS_R_W,                                       -- ObjectKind=Pin|PrimaryId=U6-IO
        O  => PinSignal_U6_O,                                -- ObjectKind=Pin|PrimaryId=U6-O
        T  => PinSignal_U63_O                                -- ObjectKind=Pin|PrimaryId=U6-T
      );

    U5 : FJKC_1                                              -- ObjectKind=Part|PrimaryId=U5|SecondaryId=1
      Port Map
      (
        C   => PinSignal_U12_O,                              -- ObjectKind=Pin|PrimaryId=U5-C
        CLR => PowerSignal_GND,                              -- ObjectKind=Pin|PrimaryId=U5-CLR
        J   => PinSignal_U4_Q,                               -- ObjectKind=Pin|PrimaryId=U5-J
        K   => PowerSignal_VCC,                              -- ObjectKind=Pin|PrimaryId=U5-K
        Q   => PinSignal_U5_Q                                -- ObjectKind=Pin|PrimaryId=U5-Q
      );

    U4 : FJKC_1                                              -- ObjectKind=Part|PrimaryId=U4|SecondaryId=1
      Port Map
      (
        C   => PinSignal_U14_O,                              -- ObjectKind=Pin|PrimaryId=U4-C
        CLR => PowerSignal_GND,                              -- ObjectKind=Pin|PrimaryId=U4-CLR
        J   => PinSignal_U2_O,                               -- ObjectKind=Pin|PrimaryId=U4-J
        K   => PinSignal_U8_O,                               -- ObjectKind=Pin|PrimaryId=U4-K
        Q   => PinSignal_U4_Q                                -- ObjectKind=Pin|PrimaryId=U4-Q
      );

    U3 : Configurable_U3                                     -- ObjectKind=Part|PrimaryId=U3|SecondaryId=1
      Port Map
      (
        I0 => PinSignal_U5_Q,                                -- ObjectKind=Pin|PrimaryId=U3-I0
        I1 => PinSignal_U5_Q,                                -- ObjectKind=Pin|PrimaryId=U3-I1
        I2 => PinSignal_U5_Q,                                -- ObjectKind=Pin|PrimaryId=U3-I2
        I3 => PinSignal_U5_Q,                                -- ObjectKind=Pin|PrimaryId=U3-I3
        O  => PinSignal_U3_O                                 -- ObjectKind=Pin|PrimaryId=U3-O
      );

    U2 : Configurable_U2                                     -- ObjectKind=Part|PrimaryId=U2|SecondaryId=1
      Port Map
      (
        I => BUS_PHASE1,                                     -- ObjectKind=Pin|PrimaryId=U2-I
        O => PinSignal_U2_O                                  -- ObjectKind=Pin|PrimaryId=U2-O
      );

    U1 : FRQCNT2                                             -- ObjectKind=Part|PrimaryId=U1|SecondaryId=1
      Port Map
      (
        FREQA    => NamedSignal_BUS_PHASE1,                  -- ObjectKind=Pin|PrimaryId=U1-FREQA
        FREQB    => NamedSignal_Z80CLK,                      -- ObjectKind=Pin|PrimaryId=U1-FREQB
        TCK      => TCK_SOFT,                                -- ObjectKind=Pin|PrimaryId=U1-TCK
        TDI      => PinSignal_SOFTCARD1_TDO,                 -- ObjectKind=Pin|PrimaryId=U1-TDI
        TDO      => PinSignal_U1_TDO,                        -- ObjectKind=Pin|PrimaryId=U1-TDO
        TIMEBASE => NamedSignal_CLK50,                       -- ObjectKind=Pin|PrimaryId=U1-TIMEBASE
        TMS      => TMS_SOFT,                                -- ObjectKind=Pin|PrimaryId=U1-TMS
        TRST     => NamedSignal_JTAG_NEXUS_TRST              -- ObjectKind=Pin|PrimaryId=U1-TRST
      );

    SOFTCARD1 : Configurable_SOFTCARD1                       -- ObjectKind=Part|PrimaryId=SOFTCARD1|SecondaryId=1
      Port Map
      (
        ACQUIRE_BUS  => NamedSignal_ACQUIREBUS,              -- ObjectKind=Pin|PrimaryId=SOFTCARD1-ACQUIRE_BUS
        AP_BUS_DMA   => NamedSignal_APDMA,                   -- ObjectKind=Pin|PrimaryId=SOFTCARD1-AP_BUS_DMA
        BUS_DMA_OUT  => NamedSignal_BDMAO,                   -- ObjectKind=Pin|PrimaryId=SOFTCARD1-BUS_DMA_OUT
        CARD_ON      => NamedSignal_CARDON,                  -- ObjectKind=Pin|PrimaryId=SOFTCARD1-CARD_ON
        TCK          => TCK_SOFT,                            -- ObjectKind=Pin|PrimaryId=SOFTCARD1-TCK
        TDI          => TDI_SOFT,                            -- ObjectKind=Pin|PrimaryId=SOFTCARD1-TDI
        TDO          => PinSignal_SOFTCARD1_TDO,             -- ObjectKind=Pin|PrimaryId=SOFTCARD1-TDO
        TMS          => TMS_SOFT,                            -- ObjectKind=Pin|PrimaryId=SOFTCARD1-TMS
        TRST         => NamedSignal_JTAG_NEXUS_TRST,         -- ObjectKind=Pin|PrimaryId=SOFTCARD1-TRST
        WR_ADD_APBUS => NamedSignal_WR_APADD,                -- ObjectKind=Pin|PrimaryId=SOFTCARD1-WR_ADD_APBUS
        WR_DAT_APBUS => NamedSignal_WR_APDATA                -- ObjectKind=Pin|PrimaryId=SOFTCARD1-WR_DAT_APBUS
      );

    CLK1 : Clock_CLK1                                        -- ObjectKind=Part|PrimaryId=CLK1|SecondaryId=1
      Port Map
      (
        CLK  => PinSignal_U68_O,                             -- ObjectKind=Pin|PrimaryId=CLK1-CLK
        CLKA => PinSignal_CLK1_CLKA,                         -- ObjectKind=Pin|PrimaryId=CLK1-CLKA
        RST  => PowerSignal_GND                              -- ObjectKind=Pin|PrimaryId=CLK1-RST
      );

    -- Signal Assignments
    ---------------------
    BUS_A0                      <= PinSignal_U40_O0; -- ObjectKind=Net|PrimaryId=BUS_A0
    BUS_A1                      <= PinSignal_U40_O1; -- ObjectKind=Net|PrimaryId=BUS_A1
    BUS_A10                     <= PinSignal_U26_O0; -- ObjectKind=Net|PrimaryId=BUS_A10
    BUS_A11                     <= PinSignal_U26_O1; -- ObjectKind=Net|PrimaryId=BUS_A11
    BUS_A12                     <= PinSignal_U26_O2; -- ObjectKind=Net|PrimaryId=BUS_A12
    BUS_A13                     <= PinSignal_U26_O3; -- ObjectKind=Net|PrimaryId=BUS_A13
    BUS_A14                     <= PinSignal_U26_O4; -- ObjectKind=Net|PrimaryId=BUS_A14
    BUS_A15                     <= PinSignal_U26_O5; -- ObjectKind=Net|PrimaryId=BUS_A15
    BUS_A2                      <= PinSignal_U40_O2; -- ObjectKind=Net|PrimaryId=BUS_A2
    BUS_A3                      <= PinSignal_U40_O3; -- ObjectKind=Net|PrimaryId=BUS_A3
    BUS_A4                      <= PinSignal_U36_O0; -- ObjectKind=Net|PrimaryId=BUS_A4
    BUS_A5                      <= PinSignal_U36_O1; -- ObjectKind=Net|PrimaryId=BUS_A5
    BUS_A6                      <= PinSignal_U36_O2; -- ObjectKind=Net|PrimaryId=BUS_A6
    BUS_A7                      <= PinSignal_U36_O3; -- ObjectKind=Net|PrimaryId=BUS_A7
    BUS_A8                      <= PinSignal_U36_O4; -- ObjectKind=Net|PrimaryId=BUS_A8
    BUS_A9                      <= PinSignal_U36_O5; -- ObjectKind=Net|PrimaryId=BUS_A9
    BUS_INTOUT                  <= BUS_INTIN; -- ObjectKind=Net|PrimaryId=N00148
    CLK_EN                      <= PowerSignal_VCC; -- ObjectKind=Net|PrimaryId=SRAM_NCS1
    CLK_EXT0                    <= PowerSignal_VCC; -- ObjectKind=Net|PrimaryId=SRAM_NCS1
    CLK_EXT1                    <= PowerSignal_VCC; -- ObjectKind=Net|PrimaryId=SRAM_NCS1
    EXTSPI_CS_N0                <= PowerSignal_VCC; -- ObjectKind=Net|PrimaryId=SRAM_NCS1
    EXTSPI_CS_N1                <= PowerSignal_VCC; -- ObjectKind=Net|PrimaryId=SRAM_NCS1
    EXTSPI_DIN                  <= PowerSignal_VCC; -- ObjectKind=Net|PrimaryId=SRAM_NCS1
    EXTSPI_SCLK                 <= PowerSignal_VCC; -- ObjectKind=Net|PrimaryId=SRAM_NCS1
    NamedSignal_ACQUIREBUS      <= PinSignal_U66_O; -- ObjectKind=Net|PrimaryId=ACQUIREBUS
    NamedSignal_APDMA           <= PinSignal_U57_O; -- ObjectKind=Net|PrimaryId=APDMA
    NamedSignal_BDMAO           <= PinSignal_U54_O; -- ObjectKind=Net|PrimaryId=BDMAO
    NamedSignal_BUS_7M          <= PinSignal_U14_O; -- ObjectKind=Net|PrimaryId=BUS_7M
    NamedSignal_BUS_PHASE0      <= PinSignal_U67_O; -- ObjectKind=Net|PrimaryId=BUS_PHASE0
    NamedSignal_BUS_PHASE1      <= PinSignal_U2_O; -- ObjectKind=Net|PrimaryId=BUS_PHASE1
    NamedSignal_CARDON          <= PinSignal_U45_QN; -- ObjectKind=Net|PrimaryId=CARDON
    NamedSignal_CLK50           <= PinSignal_U70_O; -- ObjectKind=Net|PrimaryId=CLK50
    NamedSignal_DIN0            <= PinSignal_U42_Q0; -- ObjectKind=Net|PrimaryId=DIN0
    NamedSignal_DIN1            <= PinSignal_U42_Q1; -- ObjectKind=Net|PrimaryId=DIN1
    NamedSignal_DIN2            <= PinSignal_U42_Q2; -- ObjectKind=Net|PrimaryId=DIN2
    NamedSignal_DIN3            <= PinSignal_U42_Q3; -- ObjectKind=Net|PrimaryId=DIN3
    NamedSignal_DIN4            <= PinSignal_U42_Q4; -- ObjectKind=Net|PrimaryId=DIN4
    NamedSignal_DIN5            <= PinSignal_U42_Q5; -- ObjectKind=Net|PrimaryId=DIN5
    NamedSignal_DIN6            <= PinSignal_U42_Q6; -- ObjectKind=Net|PrimaryId=DIN6
    NamedSignal_DIN7            <= PinSignal_U42_Q7; -- ObjectKind=Net|PrimaryId=DIN7
    NamedSignal_JTAG_NEXUS_TRST <= PowerSignal_VCC; -- ObjectKind=Net|PrimaryId=SRAM_NCS1
    NamedSignal_PIN17           <= PinSignal_U65_O; -- ObjectKind=Net|PrimaryId=PIN17
    NamedSignal_PIN18           <= PinSignal_U_Z80_HALT_N; -- ObjectKind=Net|PrimaryId=PIN18
    NamedSignal_PIN21           <= PinSignal_U_Z80_RD_N; -- ObjectKind=Net|PrimaryId=PIN21
    NamedSignal_PIN22           <= PinSignal_U_Z80_WR_N; -- ObjectKind=Net|PrimaryId=PIN22
    NamedSignal_PIN23           <= PinSignal_U_Z80_BUSAK_N; -- ObjectKind=Net|PrimaryId=PIN23
    NamedSignal_PIN24           <= PinSignal_U46_Q; -- ObjectKind=Net|PrimaryId=PIN24
    NamedSignal_PIN25           <= PinSignal_U38_O; -- ObjectKind=Net|PrimaryId=PIN25
    NamedSignal_PIN26           <= PinSignal_U58_Q; -- ObjectKind=Net|PrimaryId=PIN26
    NamedSignal_PIN27           <= PinSignal_U_Z80_M1_N; -- ObjectKind=Net|PrimaryId=PIN27
    NamedSignal_PIN28           <= PinSignal_U_Z80_RFSH_N; -- ObjectKind=Net|PrimaryId=PIN28
    NamedSignal_RWIN            <= PinSignal_U6_O; -- ObjectKind=Net|PrimaryId=RWIN
    NamedSignal_RWOUT           <= PinSignal_U7_Q; -- ObjectKind=Net|PrimaryId=RWOUT
    NamedSignal_SRAM_A(0)       <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    NamedSignal_SRAM_A(1)       <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    NamedSignal_SRAM_A(10)      <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    NamedSignal_SRAM_A(11)      <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    NamedSignal_SRAM_A(12)      <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    NamedSignal_SRAM_A(13)      <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    NamedSignal_SRAM_A(14)      <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    NamedSignal_SRAM_A(15)      <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    NamedSignal_SRAM_A(16)      <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    NamedSignal_SRAM_A(2)       <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    NamedSignal_SRAM_A(3)       <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    NamedSignal_SRAM_A(4)       <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    NamedSignal_SRAM_A(5)       <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    NamedSignal_SRAM_A(6)       <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    NamedSignal_SRAM_A(7)       <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    NamedSignal_SRAM_A(8)       <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    NamedSignal_SRAM_A(9)       <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    NamedSignal_SRAM_NCS(0)     <= PowerSignal_VCC; -- ObjectKind=Net|PrimaryId=SRAM_NCS1
    NamedSignal_SRAM_NCS(1)     <= PowerSignal_VCC; -- ObjectKind=Net|PrimaryId=SRAM_NCS1
    NamedSignal_SRAM_NOE        <= PowerSignal_VCC; -- ObjectKind=Net|PrimaryId=SRAM_NCS1
    NamedSignal_SRAM_NWE        <= PowerSignal_VCC; -- ObjectKind=Net|PrimaryId=SRAM_NCS1
    NamedSignal_SYSCLK          <= SYSCLK; -- ObjectKind=Net|PrimaryId=SYSCLK
    NamedSignal_VCC1_BUS        <= "11111111"; -- ObjectKind=Net|PrimaryId=VCC1_BUS[7..0]
    NamedSignal_WR_APADD        <= PinSignal_U63_O; -- ObjectKind=Net|PrimaryId=WR_APADD
    NamedSignal_WR_APDATA       <= PinSignal_U17_O; -- ObjectKind=Net|PrimaryId=WR_APDATA
    NamedSignal_Z80_A0          <= PinSignal_U31_O0; -- ObjectKind=Net|PrimaryId=Z80_A0
    NamedSignal_Z80_A1          <= PinSignal_U31_O1; -- ObjectKind=Net|PrimaryId=Z80_A1
    NamedSignal_Z80_A10         <= PinSignal_U31_O10; -- ObjectKind=Net|PrimaryId=Z80_A10
    NamedSignal_Z80_A11         <= PinSignal_U31_O11; -- ObjectKind=Net|PrimaryId=Z80_A11
    NamedSignal_Z80_A12         <= PinSignal_U28_O0; -- ObjectKind=Net|PrimaryId=Z80_A12
    NamedSignal_Z80_A13         <= PinSignal_U28_O1; -- ObjectKind=Net|PrimaryId=Z80_A13
    NamedSignal_Z80_A14         <= PinSignal_U28_O2; -- ObjectKind=Net|PrimaryId=Z80_A14
    NamedSignal_Z80_A15         <= PinSignal_U28_O3; -- ObjectKind=Net|PrimaryId=Z80_A15
    NamedSignal_Z80_A2          <= PinSignal_U31_O2; -- ObjectKind=Net|PrimaryId=Z80_A2
    NamedSignal_Z80_A3          <= PinSignal_U31_O3; -- ObjectKind=Net|PrimaryId=Z80_A3
    NamedSignal_Z80_A4          <= PinSignal_U31_O4; -- ObjectKind=Net|PrimaryId=Z80_A4
    NamedSignal_Z80_A5          <= PinSignal_U31_O5; -- ObjectKind=Net|PrimaryId=Z80_A5
    NamedSignal_Z80_A6          <= PinSignal_U31_O6; -- ObjectKind=Net|PrimaryId=Z80_A6
    NamedSignal_Z80_A7          <= PinSignal_U31_O7; -- ObjectKind=Net|PrimaryId=Z80_A7
    NamedSignal_Z80_A8          <= PinSignal_U31_O8; -- ObjectKind=Net|PrimaryId=Z80_A8
    NamedSignal_Z80_A9          <= PinSignal_U31_O9; -- ObjectKind=Net|PrimaryId=Z80_A9
    NamedSignal_Z80CLK          <= PinSignal_U3_O; -- ObjectKind=Net|PrimaryId=Z80CLK
    PBIO0                       <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    PBIO1                       <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    PBIO2                       <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    PBIO3                       <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    PBIO4                       <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    PBIO45                      <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    PBIO46                      <= PowerSignal_GND; -- ObjectKind=Net|PrimaryId=SRAM_A16
    PBIO49                      <= PowerSignal_VCC; -- ObjectKind=Net|PrimaryId=SRAM_NCS1
    PowerSignal_GND             <= '0'; -- ObjectKind=Net|PrimaryId=SRAM_A16
    PowerSignal_VCC             <= '1'; -- ObjectKind=Net|PrimaryId=SRAM_NCS1
    PROM_CS                     <= PowerSignal_VCC; -- ObjectKind=Net|PrimaryId=SRAM_NCS1
    SRAM_A                      <= NamedSignal_SRAM_A; -- ObjectKind=Net|PrimaryId=SRAM_A[16..0]
    SRAM_NCS                    <= NamedSignal_SRAM_NCS; -- ObjectKind=Net|PrimaryId=SRAM_NCS[1..0]
    SRAM_NOE                    <= NamedSignal_SRAM_NOE; -- ObjectKind=Net|PrimaryId=SRAM_NCS1
    SRAM_NWE                    <= NamedSignal_SRAM_NWE; -- ObjectKind=Net|PrimaryId=SRAM_NCS1
    TDO_SOFT                    <= PinSignal_Z2_TDO; -- ObjectKind=Net|PrimaryId=JTAG_NEXUS_TDO

end structure;
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